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@ -17,9 +17,11 @@ |
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* ---------------------------------------------------------------------------- |
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* Heavily modified and enhanced by Thorsten von Eicken in 2015 |
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*/ |
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#define USE_US_TIMER |
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#include "esp8266.h" |
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#include "task.h" |
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#include "uart.h" |
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#include <osapi.h> |
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#ifdef UART_DBG |
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#define DBG_UART(format, ...) os_printf(format, ## __VA_ARGS__) |
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@ -28,6 +30,7 @@ |
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#endif |
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LOCAL uint8_t uart_recvTaskNum; |
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LOCAL int8_t uart0_tx_enable_pin; |
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev; |
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@ -36,6 +39,52 @@ static UartRecv_cb uart_recv_cb[4]; |
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static void uart0_rx_intr_handler(void *para); |
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/******************************************************************************
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* FunctionName : set_tx_enable_pin |
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* Description : Set which pin to use for RS-485 TX_ENABLE |
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* Parameters : pin, the pin to use |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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uart0_set_tx_enable_pin(int8_t pin) { |
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uart0_tx_enable_pin = pin; |
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} |
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/******************************************************************************
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* FunctionName : tx_enable |
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* Description : Internal used function |
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* Set the TX_ENABLE line for RS-485 communications |
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* Parameters : state, true if the TX_ENABLE line should be asserted high |
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* Returns : NONE |
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*******************************************************************************/ |
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static void ICACHE_FLASH_ATTR |
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tx_enable(bool state) |
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{ |
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if (uart0_tx_enable_pin >= 0) { |
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#ifdef SERBR_DBG |
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os_printf("TX_ENABLE gpio%d state=%d\n", uart0_tx_enable_pin, (int)state); |
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#endif |
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GPIO_OUTPUT_SET(uart0_tx_enable_pin, (state) ? 1 : 0); |
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} |
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#ifdef SERBR_DBG |
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else { os_printf("TX Enable: no pin\n"); } |
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#endif |
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} |
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/******************************************************************************
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* FunctionName : tx_completed_interrupt |
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* Description : Internal used function |
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* Set the TX enable line low, after the UART has completed tranmission |
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* Parameters : unused unused |
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* Returns : NONE |
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*******************************************************************************/ |
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static void ICACHE_FLASH_ATTR |
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tx_completed_interrupt(void *arg) |
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{ |
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tx_enable(false); |
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} |
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/******************************************************************************
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* FunctionName : uart_config |
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* Description : Internal used function |
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@ -81,12 +130,19 @@ uart_config(uint8 uart_no) |
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// to set the threshold here...
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// We do not enable framing error interrupts 'cause they tend to cause an interrupt avalanche
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// and instead just poll for them when we get a std RX interrupt.
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uint32_t tx_empty_bits = 0; |
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if (uart0_tx_enable_pin >= 0) { |
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tx_empty_bits = (0 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S | UART_TXFIFO_EMPTY_INT_ENA; |
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} |
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WRITE_PERI_REG(UART_CONF1(uart_no), |
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((80 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | |
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((100 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | |
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UART_RX_FLOW_EN | |
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(4 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | |
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UART_RX_TOUT_EN); |
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UART_RX_TOUT_EN) | |
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tx_empty_bits |
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; |
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA); |
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} else { |
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WRITE_PERI_REG(UART_CONF1(uart_no), |
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@ -97,6 +153,9 @@ uart_config(uint8 uart_no) |
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); |
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} |
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os_timer_t uart_tx_enable_timer; |
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bool uart_tx_enable_timer_inited = false; |
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/******************************************************************************
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* FunctionName : uart1_tx_one_char |
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* Description : Internal used function |
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@ -110,6 +169,16 @@ uart_tx_one_char(uint8 uart, uint8 c) |
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//Wait until there is room in the FIFO
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while (((READ_PERI_REG(UART_STATUS(uart))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=100) ; |
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//Send the character
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if (UART0 == uart) { |
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if (uart_tx_enable_timer_inited) { |
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// If a tx_completed_interrupt has already been scheduled, cancel it before it fires during our transmission
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os_timer_disarm(&uart_tx_enable_timer); |
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} else { |
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os_timer_setfn(&uart_tx_enable_timer, tx_completed_interrupt, NULL); |
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} |
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tx_enable(true); |
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} |
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WRITE_PERI_REG(UART_FIFO(uart), c); |
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return OK; |
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} |
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@ -168,6 +237,7 @@ uart0_sendStr(const char *str) |
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} |
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static uint32 last_frm_err; // time in us when last framing error message was printed
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static int uart0_baud_rate = 0; // The baud rate for uart0
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler |
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@ -206,6 +276,12 @@ uart0_rx_intr_handler(void *para) |
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//DBG_UART("stat:%02X",*(uint8 *)UART_INT_ENA(uart_no));
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ETS_UART_INTR_DISABLE(); |
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post_usr_task(uart_recvTaskNum, 0); |
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} else if (UART_TXFIFO_EMPTY_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_TXFIFO_EMPTY_INT_ST)) { |
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// TX Queue is empty, disable the TX_ENABLE line once the transmission is complete
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if (0 != uart0_baud_rate) { |
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int tx_char_time = 8 * 1000000 / uart0_baud_rate; // assumes 8 bits per character
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os_timer_arm_us(&uart_tx_enable_timer, tx_char_time, false); |
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} |
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} |
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} |
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@ -255,6 +331,7 @@ done: |
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void ICACHE_FLASH_ATTR |
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uart0_baud(int rate) { |
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uart0_baud_rate = rate; |
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os_printf("UART %d baud\n", rate); |
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uart_div_modify(UART0, UART_CLK_FREQ / rate); |
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} |
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@ -263,13 +340,19 @@ uart0_baud(int rate) { |
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* FunctionName : uart_init |
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* Description : user interface for init uart |
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* Parameters : UartBautRate uart0_br - uart0 bautrate |
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* uart0TxEnablePin |
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* UartBautRate uart1_br - uart1 bautrate |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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uart_init(UartBautRate uart0_br, UartBautRate uart1_br) |
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uart_init(UartBautRate uart0_br, int8_t uart0TxEnablePin, UartBautRate uart1_br) |
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{ |
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if (uart0TxEnablePin >= 0) { |
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uart0_set_tx_enable_pin(uart0TxEnablePin); |
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} |
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// rom use 74880 baut_rate, here reinitialize
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uart0_baud_rate = (int)uart0_br; |
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UartDev.baut_rate = uart0_br; |
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uart_config(UART0); |
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UartDev.baut_rate = uart1_br; |
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@ -298,7 +381,7 @@ uart_add_recv_cb(UartRecv_cb cb) { |
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void ICACHE_FLASH_ATTR |
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uart_reattach() |
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{ |
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uart_init(BIT_RATE_74880, BIT_RATE_74880); |
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uart_init(BIT_RATE_74880, -1, BIT_RATE_74880); |
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// ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff));
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// ETS_UART_INTR_ENABLE();
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} |
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Alastair D'Silva
9 years ago