wirtz
/
esp-link
mirror of https://github.com/jeelabs/esp-link.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Add a clarifying comment about the setup of TX empty

Browse Source
pull/138/head
Alastair D'Silva 9 years ago
parent f4ee1dbed4
commit 1dcd1f7b10
1 changed files with 1 additions and 0 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 1
      serial/uart.c

1
serial/uart.c
Unescape View File

@ -131,6 +131,7 @@ uart_config(uint8 uart_no)
uint32_t tx_empty_bits = 0; uint32_t tx_empty_bits = 0;
if (uart0_tx_enable_pin >= 0) { if (uart0_tx_enable_pin >= 0) {
// Set the empty threshold to 0 and enable the buffer empty interrupt
tx_empty_bits = (0 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S | UART_TXFIFO_EMPTY_INT_ENA; tx_empty_bits = (0 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S | UART_TXFIFO_EMPTY_INT_ENA;
} }
WRITE_PERI_REG(UART_CONF1(uart_no), WRITE_PERI_REG(UART_CONF1(uart_no),

Write Preview
Loading…
Cancel
Save