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271 lines
9.5 KiB
271 lines
9.5 KiB
/*
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* File : uart.c
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* This file is part of Espressif's AT+ command set program.
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* Copyright (C) 2013 - 2016, Espressif Systems
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of version 3 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "espmissingincludes.h"
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#include "ets_sys.h"
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#include "osapi.h"
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#include "user_interface.h"
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#include "uart.h"
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#define recvTaskPrio 0
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#define recvTaskQueueLen 64
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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os_event_t recvTaskQueue[recvTaskQueueLen];
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#define MAX_CB 4
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static UartRecv_cb uart_recv_cb[4];
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static void uart0_rx_intr_handler(void *para);
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/******************************************************************************
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* FunctionName : uart_config
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* Description : Internal used function
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
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* UART1 just used for debug output
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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uart_config(uint8 uart_no)
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{
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if (uart_no == UART1) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
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PIN_PULLDWN_DIS(PERIPHS_IO_MUX_GPIO2_U);
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
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} else {
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/* rcv_buff size if 0x100 */
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
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}
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uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
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if (uart_no == UART1) //UART 1 always 8 N 1
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WRITE_PERI_REG(UART_CONF0(uart_no),
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CALC_UARTMODE(EIGHT_BITS, NONE_BITS, ONE_STOP_BIT));
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else
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WRITE_PERI_REG(UART_CONF0(uart_no),
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CALC_UARTMODE(UartDev.data_bits, UartDev.parity, UartDev.stop_bits));
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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if (uart_no == UART0) {
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// Configure RX interrupt conditions as follows: trigger rx-full when there are 80 characters
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// in the buffer (allows for 64-byte HEX records), trigger rx-timeout when the fifo is
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// non-empty and nothing further has been received for 4 character period. Also set the
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// hardware flow-control to trigger when the FIFO holds 100 characters, although we don't
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// really expect the signals to actually be wired up to anything. It doesn't hurt to set
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// the threshold here...
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((80 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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((100 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
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UART_RX_FLOW_EN |
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(4 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
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UART_RX_TOUT_EN);
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA |
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UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA);
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} else {
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
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}
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
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}
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/******************************************************************************
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* FunctionName : uart1_tx_one_char
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* Description : Internal used function
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* Use uart1 interface to transfer one char
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* Parameters : uint8 TxChar - character to tx
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* Returns : OK
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*******************************************************************************/
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static STATUS
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uart_tx_one_char(uint8 uart, uint8 c)
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{
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//Wait until there is room in the FIFO
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while (((READ_PERI_REG(UART_STATUS(uart))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=100) ;
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//Send the character
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WRITE_PERI_REG(UART_FIFO(uart), c);
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return OK;
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}
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/******************************************************************************
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* FunctionName : uart1_write_char
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* Description : Internal used function
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* Do some special deal while tx char is '\r' or '\n'
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* Parameters : char c - character to tx
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart1_write_char(char c)
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{
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if (c == '\n') uart_tx_one_char(UART1, '\r');
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uart_tx_one_char(UART1, c);
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}
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void ICACHE_FLASH_ATTR
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uart0_write_char(char c)
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{
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if (c == '\n') uart_tx_one_char(UART0, '\r');
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uart_tx_one_char(UART0, c);
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}
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/******************************************************************************
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* FunctionName : uart0_tx_buffer
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_tx_buffer(char *buf, uint16 len)
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{
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uint16 i;
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for (i = 0; i < len; i++)
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{
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uart_tx_one_char(UART0, buf[i]);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_sendStr
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_sendStr(const char *str)
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{
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while(*str)
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{
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uart_tx_one_char(UART0, *str++);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler
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* Description : Internal used function
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* UART0 interrupt handler, add self handle code inside
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
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* Returns : NONE
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*******************************************************************************/
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static void // must not use ICACHE_FLASH_ATTR !
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uart0_rx_intr_handler(void *para)
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{
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/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2,
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* bit0 represents uart1 and uart0 respectively */
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uint8 uart_no = UART0;//UartDev.buff_uart_no;
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if(UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST))
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{
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os_printf("FRM_ERR\r\n");
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
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}
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if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
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{
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//os_printf("fifo full\r\n");
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ETS_UART_INTR_DISABLE();
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system_os_post(recvTaskPrio, 0, 0);
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}
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else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST))
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{
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ETS_UART_INTR_DISABLE();
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//os_printf("stat:%02X",*(uint8 *)UART_INT_ENA(uart_no));
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system_os_post(recvTaskPrio, 0, 0);
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}
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}
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/******************************************************************************
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* FunctionName : uart_recvTask
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* Description : system task triggered on receive interrupt, empties FIFO and calls callbacks
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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uart_recvTask(os_event_t *events)
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{
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while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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//WRITE_PERI_REG(0X60000914, 0x73); //WTD // commented out by TvE
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// read a buffer-full from the uart
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uint16 length = 0;
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char buf[128];
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while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) &&
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(length < 128)) {
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buf[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
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}
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//os_printf("%d ix %d\n", system_get_time(), length);
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for (int i=0; i<MAX_CB; i++) {
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if (uart_recv_cb[i] != NULL) (uart_recv_cb[i])(buf, length);
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}
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}
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WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
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ETS_UART_INTR_ENABLE();
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}
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/******************************************************************************
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* FunctionName : uart_init
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* Description : user interface for init uart
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* Parameters : UartBautRate uart0_br - uart0 bautrate
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* UartBautRate uart1_br - uart1 bautrate
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart_init(UartBautRate uart0_br, UartBautRate uart1_br)
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{
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// rom use 74880 baut_rate, here reinitialize
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UartDev.baut_rate = uart0_br;
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uart_config(UART0);
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UartDev.baut_rate = uart1_br;
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uart_config(UART1);
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for (int i=0; i<4; i++) uart_tx_one_char(UART1, '\n');
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for (int i=0; i<4; i++) uart_tx_one_char(UART0, '\n');
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ETS_UART_INTR_ENABLE();
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// install uart1 putc callback
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os_install_putc1((void *)uart0_write_char);
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system_os_task(uart_recvTask, recvTaskPrio, recvTaskQueue, recvTaskQueueLen);
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}
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void ICACHE_FLASH_ATTR
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uart_add_recv_cb(UartRecv_cb cb) {
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for (int i=0; i<MAX_CB; i++) {
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if (uart_recv_cb[i] == NULL) {
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uart_recv_cb[i] = cb;
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return;
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}
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}
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os_printf("UART: max cb count exceeded\n");
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}
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void ICACHE_FLASH_ATTR
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uart_reattach()
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{
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uart_init(BIT_RATE_74880, BIT_RATE_74880);
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// ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff));
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// ETS_UART_INTR_ENABLE();
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}
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