mirror of https://github.com/jeelabs/esp-link.git
Jeroen Domburg
10 years ago
commit
b736d77abb
@ -0,0 +1,148 @@ |
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# tnx to mamalala
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# Changelog
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# Changed the variables to include the header file directory
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# Added global var for the XTENSA tool root
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#
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# This make file still needs some work.
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#
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#
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# Output directors to store intermediate compiled files
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# relative to the project directory
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BUILD_BASE = build
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FW_BASE = firmware
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# Base directory for the compiler
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XTENSA_TOOLS_ROOT ?= /opt/Espressif/crosstool-NG/builds/xtensa-lx106-elf/bin
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# base directory of the ESP8266 SDK package, absolute
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SDK_BASE ?= /opt/Espressif/ESP8266_SDK
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#Esptool.py path and port
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ESPTOOL ?= esptool.py
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ESPPORT ?= /dev/ttyUSB0
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# name for the target project
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TARGET = ting
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# which modules (subdirectories) of the project to include in compiling
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MODULES = driver user
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EXTRA_INCDIR = include ../../esp_iot_sdk_novm_unpacked/usr/xtensa/XtDevTools/install/builds/RC-2010.1-win32/lx106/xtensa-elf/include/
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# libraries used in this project, mainly provided by the SDK
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LIBS = c gcc hal phy net80211 lwip wpa main
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# compiler flags using during compilation of source files
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CFLAGS = -Os -g -O2 -Wpointer-arith -Wundef -Werror -Wl,-EL -fno-inline-functions -nostdlib -mlongcalls -mtext-section-literals -D__ets__ -DICACHE_FLASH
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# linker flags used to generate the main object file
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LDFLAGS = -nostdlib -Wl,--no-check-sections -u call_user_start -Wl,-static
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# linker script used for the above linkier step
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LD_SCRIPT = eagle.app.v6.ld
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# various paths from the SDK used in this project
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SDK_LIBDIR = lib
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SDK_LDDIR = ld
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SDK_INCDIR = include include/json
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# we create two different files for uploading into the flash
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# these are the names and options to generate them
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FW_FILE_1 = 0x00000
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FW_FILE_1_ARGS = -bo $@ -bs .text -bs .data -bs .rodata -bc -ec
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FW_FILE_2 = 0x40000
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FW_FILE_2_ARGS = -es .irom0.text $@ -ec
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# select which tools to use as compiler, librarian and linker
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CC := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-gcc
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AR := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-ar
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LD := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-gcc
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####
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#### no user configurable options below here
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####
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FW_TOOL ?= /usr/bin/esptool
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SRC_DIR := $(MODULES)
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BUILD_DIR := $(addprefix $(BUILD_BASE)/,$(MODULES))
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SDK_LIBDIR := $(addprefix $(SDK_BASE)/,$(SDK_LIBDIR))
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SDK_INCDIR := $(addprefix -I$(SDK_BASE)/,$(SDK_INCDIR))
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SRC := $(foreach sdir,$(SRC_DIR),$(wildcard $(sdir)/*.c))
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OBJ := $(patsubst %.c,$(BUILD_BASE)/%.o,$(SRC))
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LIBS := $(addprefix -l,$(LIBS))
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APP_AR := $(addprefix $(BUILD_BASE)/,$(TARGET)_app.a)
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TARGET_OUT := $(addprefix $(BUILD_BASE)/,$(TARGET).out)
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LD_SCRIPT := $(addprefix -T$(SDK_BASE)/$(SDK_LDDIR)/,$(LD_SCRIPT))
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INCDIR := $(addprefix -I,$(SRC_DIR))
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EXTRA_INCDIR := $(addprefix -I,$(EXTRA_INCDIR))
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MODULE_INCDIR := $(addsuffix /include,$(INCDIR))
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FW_FILE_1 := $(addprefix $(FW_BASE)/,$(FW_FILE_1).bin)
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FW_FILE_2 := $(addprefix $(FW_BASE)/,$(FW_FILE_2).bin)
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V ?= $(VERBOSE)
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ifeq ("$(V)","1") |
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Q :=
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vecho := @true
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else |
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Q := @
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vecho := @echo
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endif |
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vpath %.c $(SRC_DIR) |
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define compile-objects |
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$1/%.o: %.c |
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$(vecho) "CC $$<"
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$(Q) $(CC) $(INCDIR) $(MODULE_INCDIR) $(EXTRA_INCDIR) $(SDK_INCDIR) $(CFLAGS) -c $$< -o $$@
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endef |
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.PHONY: all checkdirs clean |
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all: checkdirs $(TARGET_OUT) $(FW_FILE_1) $(FW_FILE_2) |
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$(FW_FILE_1): $(TARGET_OUT) |
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$(vecho) "FW $@"
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$(Q) $(FW_TOOL) -eo $(TARGET_OUT) $(FW_FILE_1_ARGS)
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$(FW_FILE_2): $(TARGET_OUT) |
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$(vecho) "FW $@"
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$(Q) $(FW_TOOL) -eo $(TARGET_OUT) $(FW_FILE_2_ARGS)
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$(TARGET_OUT): $(APP_AR) |
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$(vecho) "LD $@"
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$(Q) $(LD) -L$(SDK_LIBDIR) $(LD_SCRIPT) $(LDFLAGS) -Wl,--start-group $(LIBS) $(APP_AR) -Wl,--end-group -o $@
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$(APP_AR): $(OBJ) |
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$(vecho) "AR $@"
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$(Q) $(AR) cru $@ $^
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checkdirs: $(BUILD_DIR) $(FW_BASE) |
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$(BUILD_DIR): |
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$(Q) mkdir -p $@
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firmware: |
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$(Q) mkdir -p $@
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flash: firmware/0x00000.bin firmware/0x40000.bin |
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-$(ESPTOOL) --port $(ESPPORT) write_flash 0x00000 firmware/0x00000.bin
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sleep 3
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-$(ESPTOOL) --port $(ESPPORT) write_flash 0x40000 firmware/0x40000.bin
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clean: |
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$(Q) rm -f $(APP_AR)
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$(Q) rm -f $(TARGET_OUT)
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$(Q) rm -rf $(BUILD_DIR)
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$(Q) rm -rf $(BUILD_BASE)
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$(Q) rm -f $(FW_FILE_1)
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$(Q) rm -f $(FW_FILE_2)
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$(Q) rm -rf $(FW_BASE)
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$(foreach bdir,$(BUILD_DIR),$(eval $(call compile-objects,$(bdir)))) |
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@ -0,0 +1,44 @@ |
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#############################################################
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# Required variables for each makefile
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# Discard this section from all parent makefiles
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# Expected variables (with automatic defaults):
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# CSRCS (all "C" files in the dir)
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# SUBDIRS (all subdirs with a Makefile)
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# GEN_LIBS - list of libs to be generated ()
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# GEN_IMAGES - list of images to be generated ()
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# COMPONENTS_xxx - a list of libs/objs in the form
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# subdir/lib to be extracted and rolled up into
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# a generated lib/image xxx.a ()
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#
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ifndef PDIR |
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GEN_LIBS = libdriver.a
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endif |
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#############################################################
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# Configuration i.e. compile options etc.
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# Target specific stuff (defines etc.) goes in here!
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# Generally values applying to a tree are captured in the
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# makefile at its root level - these are then overridden
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# for a subtree within the makefile rooted therein
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#
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#DEFINES +=
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#############################################################
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# Recursion Magic - Don't touch this!!
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#
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# Each subtree potentially has an include directory
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# corresponding to the common APIs applicable to modules
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# rooted at that subtree. Accordingly, the INCLUDE PATH
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# of a module can only contain the include directories up
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# its parent path, and not its siblings
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#
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# Required for each makefile to inherit from the parent
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#
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INCLUDES := $(INCLUDES) -I $(PDIR)include
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INCLUDES += -I ./
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PDIR := ../$(PDIR)
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sinclude $(PDIR)Makefile |
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@ -0,0 +1,247 @@ |
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/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi) |
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* |
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* FileName: uart.c |
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* |
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* Description: Two UART mode configration and interrupt handler. |
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* Check your hardware connection while use this mode. |
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* |
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* Modification history: |
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* 2014/3/12, v1.0 create this file. |
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*******************************************************************************/ |
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#include "ets_sys.h" |
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#include "osapi.h" |
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#include "driver/uart.h" |
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#include "driver/uart_register.h" |
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//#include "ssc.h"
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//#include "at.h"
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev; |
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//extern os_event_t at_recvTaskQueue[at_recvTaskQueueLen];
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LOCAL void uart0_rx_intr_handler(void *para); |
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/******************************************************************************
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* FunctionName : uart_config |
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* Description : Internal used function |
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled |
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* UART1 just used for debug output |
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* Parameters : uart_no, use UART0 or UART1 defined ahead |
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* Returns : NONE |
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*******************************************************************************/ |
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LOCAL void ICACHE_FLASH_ATTR |
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uart_config(uint8 uart_no) |
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{ |
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if (uart_no == UART1) |
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{ |
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); |
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} |
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else |
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{ |
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/* rcv_buff size if 0x100 */ |
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); |
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); |
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); |
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
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} |
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uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); |
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WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity |
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| UartDev.parity |
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| (UartDev.stop_bits << UART_STOP_BIT_NUM_S) |
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| (UartDev.data_bits << UART_BIT_NUM_S)); |
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); |
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); |
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//set rx fifo trigger
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// WRITE_PERI_REG(UART_CONF1(uart_no),
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// ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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// ((96 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) |
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// UART_RX_FLOW_EN);
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if (uart_no == UART0) |
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{ |
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//set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(uart_no), |
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((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | |
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((0x01 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | |
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UART_RX_FLOW_EN); |
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} |
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else |
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{ |
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WRITE_PERI_REG(UART_CONF1(uart_no), |
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((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); |
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} |
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); |
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//enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA); |
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} |
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/******************************************************************************
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* FunctionName : uart1_tx_one_char |
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* Description : Internal used function |
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* Use uart1 interface to transfer one char |
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* Parameters : uint8 TxChar - character to tx |
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* Returns : OK |
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*******************************************************************************/ |
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LOCAL STATUS |
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uart_tx_one_char(uint8 uart, uint8 TxChar) |
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{ |
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while (true) |
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{ |
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S); |
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { |
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break; |
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} |
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} |
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WRITE_PERI_REG(UART_FIFO(uart) , TxChar); |
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return OK; |
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} |
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|
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/******************************************************************************
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* FunctionName : uart1_write_char |
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* Description : Internal used function |
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* Do some special deal while tx char is '\r' or '\n' |
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* Parameters : char c - character to tx |
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* Returns : NONE |
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*******************************************************************************/ |
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LOCAL void ICACHE_FLASH_ATTR |
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uart0_write_char(char c) |
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{ |
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if (c == '\n') |
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{ |
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uart_tx_one_char(UART0, '\r'); |
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uart_tx_one_char(UART0, '\n'); |
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} |
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else if (c == '\r') |
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{ |
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} |
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else |
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{ |
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uart_tx_one_char(UART0, c); |
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} |
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} |
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/******************************************************************************
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* FunctionName : uart0_tx_buffer |
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* Description : use uart0 to transfer buffer |
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* Parameters : uint8 *buf - point to send buffer |
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* uint16 len - buffer len |
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* Returns : |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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uart0_tx_buffer(uint8 *buf, uint16 len) |
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{ |
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uint16 i; |
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for (i = 0; i < len; i++) |
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{ |
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uart_tx_one_char(UART0, buf[i]); |
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} |
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} |
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|
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/******************************************************************************
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* FunctionName : uart0_sendStr |
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* Description : use uart0 to transfer buffer |
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* Parameters : uint8 *buf - point to send buffer |
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* uint16 len - buffer len |
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* Returns : |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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uart0_sendStr(const char *str) |
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{ |
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while(*str) |
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{ |
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uart_tx_one_char(UART0, *str++); |
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} |
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} |
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|
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/******************************************************************************
|
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* FunctionName : uart0_rx_intr_handler |
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* Description : Internal used function |
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* UART0 interrupt handler, add self handle code inside |
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg |
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* Returns : NONE |
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*******************************************************************************/ |
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//extern void at_recvTask(void);
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LOCAL void |
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uart0_rx_intr_handler(void *para) |
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{ |
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/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
|
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* uart1 and uart0 respectively |
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*/ |
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// RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
|
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// uint8 RcvChar;
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uint8 uart_no = UART0;//UartDev.buff_uart_no;
|
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|
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// if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
|
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// {
|
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// return;
|
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// }
|
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if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) |
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{ |
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// at_recvTask();
|
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR); |
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} |
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|
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// WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
|
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|
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// if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
|
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// {
|
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// RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF;
|
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// at_recvTask();
|
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// *(pRxBuff->pWritePos) = RcvChar;
|
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|
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// system_os_post(at_recvTaskPrio, NULL, RcvChar);
|
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|
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// //insert here for get one command line from uart
|
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// if (RcvChar == '\r')
|
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// {
|
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// pRxBuff->BuffState = WRITE_OVER;
|
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// }
|
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//
|
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// pRxBuff->pWritePos++;
|
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//
|
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// if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
|
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// {
|
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// // overflow ...we may need more error handle here.
|
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// pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ;
|
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// }
|
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// }
|
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} |
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|
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/******************************************************************************
|
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* FunctionName : uart_init |
||||
* Description : user interface for init uart |
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* Parameters : UartBautRate uart0_br - uart0 bautrate |
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* UartBautRate uart1_br - uart1 bautrate |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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uart_init(UartBautRate uart0_br, UartBautRate uart1_br) |
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{ |
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// rom use 74880 baut_rate, here reinitialize
|
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UartDev.baut_rate = uart0_br; |
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uart_config(UART0); |
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UartDev.baut_rate = uart1_br; |
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uart_config(UART1); |
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ETS_UART_INTR_ENABLE(); |
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|
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// install uart0 putc callback
|
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os_install_putc1((void *)uart0_write_char); |
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} |
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|
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void ICACHE_FLASH_ATTR |
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uart_reattach() |
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{ |
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uart_init(BIT_RATE_74880, BIT_RATE_74880); |
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// ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff));
|
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// ETS_UART_INTR_ENABLE();
|
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} |
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@ -0,0 +1,101 @@ |
||||
#ifndef UART_APP_H |
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#define UART_APP_H |
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|
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#include "uart_register.h" |
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#include "eagle_soc.h" |
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#include "c_types.h" |
||||
|
||||
#define RX_BUFF_SIZE 256 |
||||
#define TX_BUFF_SIZE 100 |
||||
#define UART0 0 |
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#define UART1 1 |
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|
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typedef enum { |
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FIVE_BITS = 0x0, |
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SIX_BITS = 0x1, |
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SEVEN_BITS = 0x2, |
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EIGHT_BITS = 0x3 |
||||
} UartBitsNum4Char; |
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|
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typedef enum { |
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ONE_STOP_BIT = 0, |
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ONE_HALF_STOP_BIT = BIT2, |
||||
TWO_STOP_BIT = BIT2 |
||||
} UartStopBitsNum; |
||||
|
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typedef enum { |
||||
NONE_BITS = 0, |
||||
ODD_BITS = 0, |
||||
EVEN_BITS = BIT4 |
||||
} UartParityMode; |
||||
|
||||
typedef enum { |
||||
STICK_PARITY_DIS = 0, |
||||
STICK_PARITY_EN = BIT3 | BIT5 |
||||
} UartExistParity; |
||||
|
||||
typedef enum { |
||||
BIT_RATE_9600 = 9600, |
||||
BIT_RATE_19200 = 19200, |
||||
BIT_RATE_38400 = 38400, |
||||
BIT_RATE_57600 = 57600, |
||||
BIT_RATE_74880 = 74880, |
||||
BIT_RATE_115200 = 115200, |
||||
BIT_RATE_230400 = 230400, |
||||
BIT_RATE_460800 = 460800, |
||||
BIT_RATE_921600 = 921600 |
||||
} UartBautRate; |
||||
|
||||
typedef enum { |
||||
NONE_CTRL, |
||||
HARDWARE_CTRL, |
||||
XON_XOFF_CTRL |
||||
} UartFlowCtrl; |
||||
|
||||
typedef enum { |
||||
EMPTY, |
||||
UNDER_WRITE, |
||||
WRITE_OVER |
||||
} RcvMsgBuffState; |
||||
|
||||
typedef struct { |
||||
uint32 RcvBuffSize; |
||||
uint8 *pRcvMsgBuff; |
||||
uint8 *pWritePos; |
||||
uint8 *pReadPos; |
||||
uint8 TrigLvl; //JLU: may need to pad
|
||||
RcvMsgBuffState BuffState; |
||||
} RcvMsgBuff; |
||||
|
||||
typedef struct { |
||||
uint32 TrxBuffSize; |
||||
uint8 *pTrxBuff; |
||||
} TrxMsgBuff; |
||||
|
||||
typedef enum { |
||||
BAUD_RATE_DET, |
||||
WAIT_SYNC_FRM, |
||||
SRCH_MSG_HEAD, |
||||
RCV_MSG_BODY, |
||||
RCV_ESC_CHAR, |
||||
} RcvMsgState; |
||||
|
||||
typedef struct { |
||||
UartBautRate baut_rate; |
||||
UartBitsNum4Char data_bits; |
||||
UartExistParity exist_parity; |
||||
UartParityMode parity; // chip size in byte
|
||||
UartStopBitsNum stop_bits; |
||||
UartFlowCtrl flow_ctrl; |
||||
RcvMsgBuff rcv_buff; |
||||
TrxMsgBuff trx_buff; |
||||
RcvMsgState rcv_state; |
||||
int received; |
||||
int buff_uart_no; //indicate which uart use tx/rx buffer
|
||||
} UartDevice; |
||||
|
||||
void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); |
||||
void uart0_sendStr(const char *str); |
||||
|
||||
#endif |
||||
|
||||
@ -0,0 +1,128 @@ |
||||
//Generated at 2012-07-03 18:44:06
|
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System |
||||
* |
||||
*/ |
||||
|
||||
#ifndef UART_REGISTER_H_INCLUDED |
||||
#define UART_REGISTER_H_INCLUDED |
||||
#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00) |
||||
//version value:32'h062000
|
||||
|
||||
#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0) |
||||
#define UART_RXFIFO_RD_BYTE 0x000000FF |
||||
#define UART_RXFIFO_RD_BYTE_S 0 |
||||
|
||||
#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4) |
||||
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) |
||||
#define UART_BRK_DET_INT_RAW (BIT(7)) |
||||
#define UART_CTS_CHG_INT_RAW (BIT(6)) |
||||
#define UART_DSR_CHG_INT_RAW (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_RAW (BIT(4)) |
||||
#define UART_FRM_ERR_INT_RAW (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_RAW (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_RAW (BIT(0)) |
||||
|
||||
#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8) |
||||
#define UART_RXFIFO_TOUT_INT_ST (BIT(8)) |
||||
#define UART_BRK_DET_INT_ST (BIT(7)) |
||||
#define UART_CTS_CHG_INT_ST (BIT(6)) |
||||
#define UART_DSR_CHG_INT_ST (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_ST (BIT(4)) |
||||
#define UART_FRM_ERR_INT_ST (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_ST (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_ST (BIT(0)) |
||||
|
||||
#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC) |
||||
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) |
||||
#define UART_BRK_DET_INT_ENA (BIT(7)) |
||||
#define UART_CTS_CHG_INT_ENA (BIT(6)) |
||||
#define UART_DSR_CHG_INT_ENA (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_ENA (BIT(4)) |
||||
#define UART_FRM_ERR_INT_ENA (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_ENA (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_ENA (BIT(0)) |
||||
|
||||
#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10) |
||||
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) |
||||
#define UART_BRK_DET_INT_CLR (BIT(7)) |
||||
#define UART_CTS_CHG_INT_CLR (BIT(6)) |
||||
#define UART_DSR_CHG_INT_CLR (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_CLR (BIT(4)) |
||||
#define UART_FRM_ERR_INT_CLR (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_CLR (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_CLR (BIT(0)) |
||||
|
||||
#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14) |
||||
#define UART_CLKDIV_CNT 0x000FFFFF |
||||
#define UART_CLKDIV_S 0 |
||||
|
||||
#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18) |
||||
#define UART_GLITCH_FILT 0x000000FF |
||||
#define UART_GLITCH_FILT_S 8 |
||||
#define UART_AUTOBAUD_EN (BIT(0)) |
||||
|
||||
#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C) |
||||
#define UART_TXD (BIT(31)) |
||||
#define UART_RTSN (BIT(30)) |
||||
#define UART_DTRN (BIT(29)) |
||||
#define UART_TXFIFO_CNT 0x000000FF |
||||
#define UART_TXFIFO_CNT_S 16 |
||||
#define UART_RXD (BIT(15)) |
||||
#define UART_CTSN (BIT(14)) |
||||
#define UART_DSRN (BIT(13)) |
||||
#define UART_RXFIFO_CNT 0x000000FF |
||||
#define UART_RXFIFO_CNT_S 0 |
||||
|
||||
#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20) |
||||
#define UART_TXFIFO_RST (BIT(18)) |
||||
#define UART_RXFIFO_RST (BIT(17)) |
||||
#define UART_IRDA_EN (BIT(16)) |
||||
#define UART_TX_FLOW_EN (BIT(15)) |
||||
#define UART_LOOPBACK (BIT(14)) |
||||
#define UART_IRDA_RX_INV (BIT(13)) |
||||
#define UART_IRDA_TX_INV (BIT(12)) |
||||
#define UART_IRDA_WCTL (BIT(11)) |
||||
#define UART_IRDA_TX_EN (BIT(10)) |
||||
#define UART_IRDA_DPLX (BIT(9)) |
||||
#define UART_TXD_BRK (BIT(8)) |
||||
#define UART_SW_DTR (BIT(7)) |
||||
#define UART_SW_RTS (BIT(6)) |
||||
#define UART_STOP_BIT_NUM 0x00000003 |
||||
#define UART_STOP_BIT_NUM_S 4 |
||||
#define UART_BIT_NUM 0x00000003 |
||||
#define UART_BIT_NUM_S 2 |
||||
#define UART_PARITY_EN (BIT(1)) |
||||
#define UART_PARITY (BIT(0)) |
||||
|
||||
#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24) |
||||
#define UART_RX_TOUT_EN (BIT(31)) |
||||
#define UART_RX_TOUT_THRHD 0x0000007F |
||||
#define UART_RX_TOUT_THRHD_S 24 |
||||
#define UART_RX_FLOW_EN (BIT(23)) |
||||
#define UART_RX_FLOW_THRHD 0x0000007F |
||||
#define UART_RX_FLOW_THRHD_S 16 |
||||
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F |
||||
#define UART_TXFIFO_EMPTY_THRHD_S 8 |
||||
#define UART_RXFIFO_FULL_THRHD 0x0000007F |
||||
#define UART_RXFIFO_FULL_THRHD_S 0 |
||||
|
||||
#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28) |
||||
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF |
||||
#define UART_LOWPULSE_MIN_CNT_S 0 |
||||
|
||||
#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C) |
||||
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF |
||||
#define UART_HIGHPULSE_MIN_CNT_S 0 |
||||
|
||||
#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30) |
||||
#define UART_PULSE_NUM_CNT 0x0003FF |
||||
#define UART_PULSE_NUM_CNT_S 0 |
||||
|
||||
#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78) |
||||
#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C) |
||||
#endif // UART_REGISTER_H_INCLUDED
|
||||
@ -0,0 +1 @@ |
||||
|
||||
@ -0,0 +1,201 @@ |
||||
#include "driver/uart.h" |
||||
#include "c_types.h" |
||||
#include "user_interface.h" |
||||
#include "espconn.h" |
||||
#include "mem.h" |
||||
#include "osapi.h" |
||||
|
||||
#include "espconn.h" |
||||
#include "httpd.h" |
||||
#include "io.h" |
||||
|
||||
#define MAX_HEAD_LEN 1024 |
||||
|
||||
int cgiSet(struct espconn *conn); |
||||
|
||||
typedef int (* cgiSendCallback)(struct espconn *conn); |
||||
|
||||
typedef struct { |
||||
const char *url; |
||||
const char *fixedResp; |
||||
cgiSendCallback cgiCb; |
||||
} UrlData; |
||||
|
||||
const char htmlIndex[]="<html><head><title>Hello World</title></head> \
|
||||
<body><h1>Hello, World!</h1></body> \
|
||||
</html>"; |
||||
|
||||
|
||||
static const UrlData urls[]={ |
||||
{"/", htmlIndex, NULL}, |
||||
{"/set", NULL, cgiSet}, |
||||
{NULL, NULL, NULL}, |
||||
}; |
||||
|
||||
static struct espconn conn; |
||||
static esp_tcp tcp; |
||||
|
||||
static int recLen; |
||||
static char recBuff[MAX_HEAD_LEN]; |
||||
|
||||
typedef struct { |
||||
char *url; |
||||
char *getArgs; |
||||
const UrlData *effUrl; |
||||
} GetData; |
||||
|
||||
static GetData getData; |
||||
|
||||
//Find a specific arg in a string of get- or post-data.
|
||||
static char *ICACHE_FLASH_ATTR httpdFindArg(char *line, char *arg) { |
||||
char *p; |
||||
int al; |
||||
if (line==NULL) return NULL; |
||||
|
||||
p=line; |
||||
al=os_strlen(arg); |
||||
os_printf("Finding %s in %s\n", arg, line); |
||||
|
||||
while (p[0]!=0) { |
||||
if (os_strncmp(p, arg, al)==0 && p[al]=='=') { |
||||
//Gotcha.
|
||||
return &p[al+1]; |
||||
} else { |
||||
//Wrong arg. Advance to start of next arg.
|
||||
p+=os_strlen(p)+1; |
||||
} |
||||
} |
||||
os_printf("Finding %s in %s: Not found :/\n", arg, line); |
||||
return NULL; //not found
|
||||
} |
||||
|
||||
//ToDo: Move cgi functions to somewhere else
|
||||
int cgiSet(struct espconn *conn) { |
||||
char *on; |
||||
static const char okStr[]="<html><head><title>OK</title></head><body><p>OK</p></body></html>"; |
||||
on=httpdFindArg(getData.getArgs, "led"); |
||||
os_printf("cgiSet: on=%s\n", on?on:"not found"); |
||||
if (on!=NULL) ioLed(atoi(on)); |
||||
espconn_sent(conn, (uint8 *)okStr, os_strlen(okStr)); |
||||
return 1; |
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
static const char *httpOkHeader="HTTP/1.0 200 OK\r\nServer: esp8266-thingie/0.1\r\nContent-Type: text/html\r\n\r\n"; |
||||
static const char *httpNotFoundHeader="HTTP/1.0 404 Not Found\r\nServer: esp8266-thingie/0.1\r\n\r\nNot Found.\r\n"; |
||||
|
||||
static void ICACHE_FLASH_ATTR httpdSentCb(void *arg) { |
||||
struct espconn *conn=arg; |
||||
if (getData.effUrl==NULL) { |
||||
espconn_disconnect(conn); |
||||
return; |
||||
} |
||||
|
||||
if (getData.effUrl->cgiCb!=NULL) { |
||||
if (getData.effUrl->cgiCb(conn)) getData.effUrl=NULL; |
||||
} else { |
||||
espconn_sent(conn, (uint8 *)getData.effUrl->fixedResp, os_strlen(getData.effUrl->fixedResp)); |
||||
getData.effUrl=NULL; |
||||
} |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR httpdSendResp(struct espconn *conn) { |
||||
int i=0; |
||||
while (urls[i].url!=NULL) { |
||||
if (os_strcmp(urls[i].url, getData.url)==0) { |
||||
getData.effUrl=&urls[i]; |
||||
os_printf("Is url index %d\n", i); |
||||
espconn_sent(conn, (uint8 *)httpOkHeader, os_strlen(httpOkHeader)); |
||||
return; |
||||
} |
||||
i++; |
||||
} |
||||
//Can't find :/
|
||||
espconn_sent(conn, (uint8 *)httpNotFoundHeader, os_strlen(httpNotFoundHeader)); |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR httpdParseHeader(char *h) { |
||||
os_printf("Got header %s\n", h); |
||||
if (os_strncmp(h, "GET ", 4)==0) { |
||||
char *e; |
||||
getData.url=h+4; |
||||
e=(char*)os_strstr(getData.url, " "); |
||||
if (e==NULL) return; //wtf?
|
||||
*e=0; //terminate url part
|
||||
os_printf("URL = %s\n", getData.url); |
||||
getData.getArgs=(char*)os_strstr(getData.url, "?"); |
||||
if (getData.getArgs!=0) { |
||||
int x,l; |
||||
*getData.getArgs=0; |
||||
getData.getArgs++; |
||||
os_printf("GET args = %s\n", getData.getArgs); |
||||
l=os_strlen(getData.getArgs); |
||||
for (x=0; x<l; x++) if (getData.getArgs[x]=='&') getData.getArgs[x]=0; |
||||
//End with double-zero
|
||||
getData.getArgs[l]=0; |
||||
getData.getArgs[l+1]=0; |
||||
} else { |
||||
getData.getArgs=NULL; |
||||
} |
||||
} |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR httpdRecvCb(void *arg, char *data, unsigned short len) { |
||||
struct espconn *conn=arg; |
||||
int x; |
||||
char *p, *e; |
||||
|
||||
if (recLen==-1) return; //we don't accept data anymore
|
||||
for (x=0; x<len && recLen!=MAX_HEAD_LEN; x++) recBuff[recLen++]=data[x]; |
||||
recBuff[recLen]=0; |
||||
|
||||
//Scan for /r/n/r/n
|
||||
if ((char *)os_strstr(recBuff, "\r\n\r\n")!=NULL) { |
||||
//Reset url data
|
||||
getData.url=NULL; |
||||
//Find end of next header line
|
||||
p=recBuff; |
||||
while(p<(&recBuff[recLen-4])) { |
||||
e=(char *)os_strstr(p, "\r\n"); |
||||
if (e==NULL) break; |
||||
e[0]=0; |
||||
httpdParseHeader(p); |
||||
p=e+2; |
||||
} |
||||
httpdSendResp(conn); |
||||
} |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR httpdReconCb(void *arg, sint8 err) { |
||||
os_printf("ReconCb\n"); |
||||
httpdInit(); |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR httpdDisconCb(void *arg) { |
||||
struct espconn *conn=arg; |
||||
os_printf("Disconnected, conn=%p\n", conn); |
||||
} |
||||
|
||||
|
||||
static void ICACHE_FLASH_ATTR httpdConnectCb(void *arg) { |
||||
struct espconn *conn=arg; |
||||
os_printf("Con req, conn=%p\n", conn); |
||||
recLen=0; |
||||
espconn_regist_recvcb(conn, httpdRecvCb); |
||||
espconn_regist_reconcb(conn, httpdReconCb); |
||||
espconn_regist_disconcb(conn, httpdDisconCb); |
||||
espconn_regist_sentcb(conn, httpdSentCb); |
||||
} |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR httpdInit() { |
||||
conn.type=ESPCONN_TCP; |
||||
conn.state=ESPCONN_NONE; |
||||
tcp.local_port=80; |
||||
conn.proto.tcp=&tcp; |
||||
os_printf("Httpd init, conn=%p\n", conn); |
||||
espconn_regist_connectcb(&conn, httpdConnectCb); |
||||
espconn_accept(&conn); |
||||
} |
||||
@ -0,0 +1 @@ |
||||
void ICACHE_FLASH_ATTR httpdInit(); |
||||
@ -0,0 +1,18 @@ |
||||
#include "c_types.h" |
||||
#include "user_interface.h" |
||||
#include "espconn.h" |
||||
#include "mem.h" |
||||
#include "osapi.h" |
||||
#include "gpio.h" |
||||
|
||||
void ICACHE_FLASH_ATTR ioLed(int ena) { |
||||
if (ena) { |
||||
gpio_output_set(BIT2, 0, BIT2, 0); |
||||
} else { |
||||
gpio_output_set(0, BIT2, BIT2, 0); |
||||
} |
||||
} |
||||
|
||||
void ioInit() { |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2); |
||||
} |
||||
@ -0,0 +1,2 @@ |
||||
void ICACHE_FLASH_ATTR ioLed(int ena); |
||||
void ioInit(void); |
||||
@ -0,0 +1,15 @@ |
||||
#include "ets_sys.h" |
||||
#include "driver/uart.h" |
||||
#include "osapi.h" |
||||
#include "httpd.h" |
||||
#include "io.h" |
||||
|
||||
extern uint8_t at_wifiMode; |
||||
|
||||
void user_init(void) |
||||
{ |
||||
uart_init(BIT_RATE_115200, BIT_RATE_115200); |
||||
httpdInit(); |
||||
ioInit(); |
||||
os_printf("\nReady\n"); |
||||
} |
||||
Loading…
Reference in new issue