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@ -93,6 +93,17 @@ float setI2SFreq(const float freq_Hz) { |
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Serial.println(C, 4); |
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*/ |
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// The CCM_CSCMR1 documentation says that the users of the clock should
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// be disabled and the clock gated before changing the clock parameters.
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// turn off the I2S output first
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I2S1_RCSR &= ~(I2S_RCSR_RE | I2S_RCSR_BCE); |
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I2S1_TCSR &= ~(I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE); |
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while((I2S1_RCSR & (I2S_RCSR_RE | I2S_RCSR_BCE)) || |
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(I2S1_TCSR & (I2S_TCSR_TE | I2S_TCSR_BCE))); |
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// gate the SAI1 clock
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CCM_CCGR5 &= ~CCM_CCGR5_SAI1(3); |
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// PLL
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set_audioClock(c0, c1, c2, true); |
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// divider after PLL
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@ -100,6 +111,11 @@ float setI2SFreq(const float freq_Hz) { |
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| CCM_CS1CDR_SAI1_CLK_PRED(n1-1) // &0x07
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| CCM_CS1CDR_SAI1_CLK_PODF(n2-1); // &0x3f
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CCM_CCGR5 |= CCM_CCGR5_SAI1(CCM_CCGR_ON); |
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I2S1_RCSR |= (I2S_RCSR_RE | I2S_RCSR_BCE); |
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I2S1_TCSR |= (I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE); |
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return freq_Hz; |
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#endif |
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