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/* Audio Library for Teensy 3.X
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* Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com
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*
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* Development of this audio library was funded by PJRC.COM, LLC by sales of
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* Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop
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* open source software by purchasing Teensy or other PJRC products.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice, development funding notice, and this permission
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* notice shall be included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "input_i2s_f32.h"
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#include "output_i2s_f32.h"
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#include <arm_math.h>
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DMAMEM static uint32_t i2s_rx_buffer[AUDIO_BLOCK_SAMPLES];
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audio_block_t * AudioInputI2S_F32::block_left = NULL;
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audio_block_t * AudioInputI2S_F32::block_right = NULL;
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uint16_t AudioInputI2S_F32::block_offset = 0;
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bool AudioInputI2S_F32::update_responsibility = false;
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DMAChannel AudioInputI2S_F32::dma(false);
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float AudioInputI2S_F32::sample_rate_Hz = AUDIO_SAMPLE_RATE;
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int AudioInputI2S_F32::audio_block_samples = AUDIO_BLOCK_SAMPLES;
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#define I2S_BUFFER_TO_USE_BYTES (AudioOutputI2S_F32::audio_block_samples*sizeof(i2s_rx_buffer[0]))
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void AudioInputI2S_F32::begin(void)
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{
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dma.begin(true); // Allocate the DMA channel first
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//block_left_1st = NULL;
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//block_right_1st = NULL;
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// TODO: should we set & clear the I2S_RCSR_SR bit here?
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AudioOutputI2S_F32::sample_rate_Hz = sample_rate_Hz;
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AudioOutputI2S_F32::audio_block_samples = audio_block_samples;
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AudioOutputI2S_F32::config_i2s();
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CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
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#if defined(KINETISK)
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dma.TCD->SADDR = &I2S0_RDR0;
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dma.TCD->SOFF = 0;
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
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dma.TCD->NBYTES_MLNO = 2;
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dma.TCD->SLAST = 0;
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dma.TCD->DADDR = i2s_rx_buffer;
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dma.TCD->DOFF = 2;
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//dma.TCD->CITER_ELINKNO = sizeof(i2s_tx_buffer) / 2; //original
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dma.TCD->CITER_ELINKNO = I2S_BUFFER_TO_USE_BYTES / 2;
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//dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer); //original
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dma.TCD->DLASTSGA = -I2S_BUFFER_TO_USE_BYTES;
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//dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 2; //original
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dma.TCD->BITER_ELINKNO = I2S_BUFFER_TO_USE_BYTES / 2;
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
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#endif
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
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update_responsibility = update_setup();
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dma.enable();
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I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
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I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
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dma.attachInterrupt(isr);
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};
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void AudioInputI2S_F32::isr(void)
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{
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uint32_t daddr, offset;
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const int16_t *src, *end;
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int16_t *dest_left, *dest_right;
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audio_block_t *left, *right;
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//digitalWriteFast(3, HIGH);
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#if defined(KINETISK)
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daddr = (uint32_t)(dma.TCD->DADDR);
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#endif
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dma.clearInterrupt();
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//if (daddr < (uint32_t)i2s_rx_buffer + sizeof(i2s_rx_buffer) / 2) {
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if (daddr < (uint32_t)i2s_rx_buffer + I2S_BUFFER_TO_USE_BYTES / 2) {
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// DMA is receiving to the first half of the buffer
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// need to remove data from the second half
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//src = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES/2]; //original
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//end = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES]; //original
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src = (int16_t *)&i2s_rx_buffer[audio_block_samples/2];
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end = (int16_t *)&i2s_rx_buffer[audio_block_samples];
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if (AudioInputI2S_F32::update_responsibility) AudioStream_F32::update_all();
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} else {
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// DMA is receiving to the second half of the buffer
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// need to remove data from the first half
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src = (int16_t *)&i2s_rx_buffer[0];
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//end = (int16_t *)&i2s_rx_buffer[AUDIO_BLOCK_SAMPLES/2]; //original
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end = (int16_t *)&i2s_rx_buffer[audio_block_samples/2];
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}
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left = AudioInputI2S_F32::block_left;
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right = AudioInputI2S_F32::block_right;
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if (left != NULL && right != NULL) {
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offset = AudioInputI2S_F32::block_offset;
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//if (offset <= AUDIO_BLOCK_SAMPLES/2) { //original
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if (offset <= ((uint32_t) audio_block_samples/2)) {
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dest_left = &(left->data[offset]);
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dest_right = &(right->data[offset]);
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//AudioInputI2S_F32::block_offset = offset + AUDIO_BLOCK_SAMPLES/2; //original
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AudioInputI2S_F32::block_offset = offset + audio_block_samples/2;
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do {
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//n = *src++;
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//*dest_left++ = (int16_t)n;
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//*dest_right++ = (int16_t)(n >> 16);
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*dest_left++ = *src++;
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*dest_right++ = *src++;
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} while (src < end);
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}
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}
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//digitalWriteFast(3, LOW);
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}
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#define I16_TO_F32_NORM_FACTOR (3.051757812500000E-05) //which is 1/32768
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void AudioInputI2S_F32::convert_i16_to_f32( int16_t *p_i16, float32_t *p_f32, int len) {
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for (int i=0; i<len; i++) { *p_f32++ = ((float32_t)(*p_i16++)) * I16_TO_F32_NORM_FACTOR; }
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}
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void AudioInputI2S_F32::update(void)
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{
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audio_block_t *new_left=NULL, *new_right=NULL, *out_left=NULL, *out_right=NULL;
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// allocate 2 new blocks, but if one fails, allocate neither
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new_left = AudioStream::allocate();
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if (new_left != NULL) {
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new_right = AudioStream::allocate();
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if (new_right == NULL) {
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AudioStream::release(new_left);
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new_left = NULL;
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}
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}
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__disable_irq();
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//if (block_offset >= AUDIO_BLOCK_SAMPLES) { //original
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if (block_offset >= audio_block_samples) {
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// the DMA filled 2 blocks, so grab them and get the
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// 2 new blocks to the DMA, as quickly as possible
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out_left = block_left;
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block_left = new_left;
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out_right = block_right;
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block_right = new_right;
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block_offset = 0;
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__enable_irq();
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// then transmit the DMA's former blocks
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// but, first, convert them to F32
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audio_block_f32_t *out_left_f32=NULL, *out_right_f32=NULL;
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out_left_f32 = AudioStream_F32::allocate_f32();
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if (out_left_f32 != NULL) {
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out_right_f32 = AudioStream_F32::allocate_f32();
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if (out_right_f32 == NULL) {
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AudioStream_F32::release(out_left_f32);
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out_left_f32 = NULL;
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}
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}
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if (out_left_f32 != NULL) {
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//convert int16 to float 32
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convert_i16_to_f32(out_left->data, out_left_f32->data, audio_block_samples);
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convert_i16_to_f32(out_right->data, out_right_f32->data, audio_block_samples);
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//transmit the f32 data!
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AudioStream_F32::transmit(out_left_f32,0);
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AudioStream_F32::transmit(out_right_f32,1);
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AudioStream_F32::release(out_left_f32);
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AudioStream_F32::release(out_right_f32);
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}
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AudioStream::release(out_left);
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AudioStream::release(out_right);
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//Serial.print(".");
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} else if (new_left != NULL) {
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// the DMA didn't fill blocks, but we allocated blocks
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if (block_left == NULL) {
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// the DMA doesn't have any blocks to fill, so
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// give it the ones we just allocated
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block_left = new_left;
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block_right = new_right;
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block_offset = 0;
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__enable_irq();
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} else {
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// the DMA already has blocks, doesn't need these
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__enable_irq();
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AudioStream::release(new_left);
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AudioStream::release(new_right);
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}
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} else {
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// The DMA didn't fill blocks, and we could not allocate
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// memory... the system is likely starving for memory!
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// Sadly, there's nothing we can do.
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__enable_irq();
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}
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}
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/******************************************************************/
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/*
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void AudioInputI2Sslave::begin(void)
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{
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dma.begin(true); // Allocate the DMA channel first
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//block_left_1st = NULL;
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//block_right_1st = NULL;
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AudioOutputI2Sslave::config_i2s();
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CORE_PIN13_CONFIG = PORT_PCR_MUX(4); // pin 13, PTC5, I2S0_RXD0
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#if defined(KINETISK)
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dma.TCD->SADDR = &I2S0_RDR0;
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dma.TCD->SOFF = 0;
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1);
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dma.TCD->NBYTES_MLNO = 2;
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dma.TCD->SLAST = 0;
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dma.TCD->DADDR = i2s_rx_buffer;
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dma.TCD->DOFF = 2;
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dma.TCD->CITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
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dma.TCD->DLASTSGA = -sizeof(i2s_rx_buffer);
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dma.TCD->BITER_ELINKNO = sizeof(i2s_rx_buffer) / 2;
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR;
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#endif
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_I2S0_RX);
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update_responsibility = update_setup();
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dma.enable();
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I2S0_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE | I2S_RCSR_FRDE | I2S_RCSR_FR;
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I2S0_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE; // TX clock enable, because sync'd to TX
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dma.attachInterrupt(isr);
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}
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*/
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