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253 lines
12 KiB
253 lines
12 KiB
3 years ago
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#pragma once
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#include <stdint.h>
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#include <core_pins.h>
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#include <type_traits>
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namespace pins
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{
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namespace // private
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{
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enum boards {
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notDefined = -1,
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T_LC,
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T3_0_1_2,
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T3_5_6,
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};
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#if defined(__MKL26Z64__)
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constexpr boards board = boards::T_LC;
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#elif defined(__MK20DX128__) || defined(__MK20DX256__)
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constexpr boards board = boards::T3_0_1_2;
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#elif defined(__MK64FX512__) || defined(__MK66FX1M0__)
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constexpr boards board = boards::T3_5_6;
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#else
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constexpr boards board = boards::notDefined;
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#endif
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static_assert(board != boards::notDefined, "Error in Pin.h");
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// Indices into GPIOx and PORT arrays below
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enum portList {
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na = -1, Port_A, Port_B, Port_C, Port_D, Port_E
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};
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//Base adresses of the GPIOx register blocks
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constexpr uintptr_t GPIOx_PDOR[] =
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{
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(uintptr_t)&(GPIOA_PDOR),
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(uintptr_t)&(GPIOB_PDOR),
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(uintptr_t)&(GPIOC_PDOR),
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(uintptr_t)&(GPIOD_PDOR),
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(uintptr_t)&(GPIOE_PDOR),
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};
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// Base adresses of the Pin Control Registers
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constexpr uintptr_t PORTx_PCR0[] =
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{
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(uintptr_t)&(PORTA_PCR0),
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(uintptr_t)&(PORTB_PCR0),
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(uintptr_t)&(PORTC_PCR0),
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(uintptr_t)&(PORTD_PCR0),
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(uintptr_t)&(PORTE_PCR0),
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};
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//----------------------------------------------------------------
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// Translate Teensy pin number to port and bitnr
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// The map will be used by the complier only, no code will be generated
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struct pinInfo {
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const portList port;
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const int pin;
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};
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constexpr pinInfo pinMap[][3] =
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{ // T-LC T3.0/1/2 T3.5/6
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/* Pin 0 */{ { Port_B, 16 },{ Port_B, 16 },{ Port_B, 16 } },
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/* Pin 1 */{ { Port_B, 17 },{ Port_B, 17 },{ Port_B, 17 } },
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/* Pin 2 */{ { Port_D, 0 },{ Port_D, 0 },{ Port_D, 0 } },
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/* Pin 3 */{ { Port_A, 1 },{ Port_A, 12 },{ Port_A, 12 } },
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/* Pin 4 */{ { Port_A, 2 },{ Port_A, 13 },{ Port_A, 13 } },
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/* Pin 5 */{ { Port_D, 7 },{ Port_D, 7 },{ Port_D, 7 } },
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/* Pin 6 */{ { Port_D, 4 },{ Port_D, 4 },{ Port_D, 4 } },
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/* Pin 7 */{ { Port_D, 2 },{ Port_D, 2 },{ Port_D, 2 } },
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/* Pin 8 */{ { Port_D, 3 },{ Port_D, 3 },{ Port_D, 3 } },
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/* Pin 9 */{ { Port_C, 3 },{ Port_C, 3 },{ Port_C, 3 } },
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/* Pin 10*/{ { Port_C, 4 },{ Port_C, 4 },{ Port_C, 4 } },
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/* Pin 11*/{ { Port_C, 6 },{ Port_C, 6 },{ Port_C, 6 } },
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/* Pin 12*/{ { Port_C, 7 },{ Port_C, 7 },{ Port_C, 7 } },
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/* Pin 13*/{ { Port_C, 5 },{ Port_C, 5 },{ Port_C, 5 } },
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/* Pin 14*/{ { Port_D, 1 },{ Port_D, 1 },{ Port_D, 1 } },
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/* Pin 15*/{ { Port_C, 0 },{ Port_C, 0 },{ Port_C, 0 } },
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/* Pin 16*/{ { Port_B, 0 },{ Port_B, 0 },{ Port_B, 0 } },
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/* Pin 17*/{ { Port_B, 1 },{ Port_B, 1 },{ Port_B, 1 } },
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/* Pin 18*/{ { Port_B, 3 },{ Port_B, 3 },{ Port_B, 3 } },
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/* Pin 19*/{ { Port_B, 2 },{ Port_B, 2 },{ Port_B, 2 } },
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/* Pin 20*/{ { Port_D, 5 },{ Port_D, 5 },{ Port_D, 5 } },
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/* Pin 21*/{ { Port_D, 6 },{ Port_D, 6 },{ Port_D, 6 } },
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/* Pin 22*/{ { Port_C, 1 },{ Port_C, 1 },{ Port_C, 1 } },
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/* Pin 23*/{ { Port_C, 2 },{ Port_C, 2 },{ Port_C, 2 } },
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/* Pin 24*/{ { Port_E, 20 },{ Port_A, 5 },{ Port_E, 26 } },
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/* Pin 25*/{ { Port_E, 21 },{ Port_B, 19 },{ Port_A, 5 } },
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/* Pin 26*/{ { Port_E, 30 },{ Port_E, 1 },{ Port_A, 14 } },
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/* Pin 27*/{ { na, -1 },{ Port_C, 9 },{ Port_A, 15 } },
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/* Pin 28*/{ { na, -1 },{ Port_C, 8 },{ Port_A, 16 } },
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/* Pin 29*/{ { na, -1 },{ Port_C, 10 },{ Port_B, 18 } },
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/* Pin 30*/{ { na, -1 },{ Port_C, 5 },{ Port_B, 19 } },
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/* Pin 31*/{ { na, -1 },{ Port_E, 6 },{ Port_B, 10 } },
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/* Pin 32*/{ { na, -1 },{ Port_B, 1 },{ Port_B, 11 } },
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/* Pin 33*/{ { na, -1 },{ Port_A, 2 },{ Port_E, 24 } },
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/* Pin 34*/{ { na, -1 },{ na, -1 },{ Port_E, 25 } },
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/* Pin 35*/{ { na, -1 },{ na, -1 },{ Port_C, 8 } },
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/* Pin 36*/{ { na, -1 },{ na, -1 },{ Port_C, 9 } },
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/* Pin 37*/{ { na, -1 },{ na, -1 },{ Port_C, 10 } },
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/* Pin 38*/{ { na, -1 },{ na, -1 },{ Port_C, 11 } },
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/* Pin 39*/{ { na, -1 },{ na, -1 },{ Port_A, 17 } },
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/* Pin 40*/{ { na, -1 },{ na, -1 },{ Port_A, 28 } },
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/* Pin 41*/{ { na, -1 },{ na, -1 },{ Port_A, 29 } },
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/* Pin 42*/{ { na, -1 },{ na, -1 },{ Port_A, 26 } },
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/* Pin 43*/{ { na, -1 },{ na, -1 },{ Port_B, 20 } },
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/* Pin 44*/{ { na, -1 },{ na, -1 },{ Port_B, 22 } },
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/* Pin 45*/{ { na, -1 },{ na, -1 },{ Port_B, 23 } },
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/* Pin 46*/{ { na, -1 },{ na, -1 },{ Port_B, 21 } },
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/* Pin 47*/{ { na, -1 },{ na, -1 },{ Port_D, 8 } },
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/* Pin 48*/{ { na, -1 },{ na, -1 },{ Port_D, 9 } },
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/* Pin 49*/{ { na, -1 },{ na, -1 },{ Port_B, 4 } },
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/* Pin 50*/{ { na, -1 },{ na, -1 },{ Port_B, 5 } },
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/* Pin 51*/{ { na, -1 },{ na, -1 },{ Port_D, 14 } },
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/* Pin 52*/{ { na, -1 },{ na, -1 },{ Port_D, 13 } },
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/* Pin 53*/{ { na, -1 },{ na, -1 },{ Port_D, 12 } },
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/* Pin 54*/{ { na, -1 },{ na, -1 },{ Port_D, 15 } },
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/* Pin 55*/{ { na, -1 },{ na, -1 },{ Port_D, 11 } },
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/* Pin 56*/{ { na, -1 },{ na, -1 },{ Port_E, 10 } },
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/* Pin 57*/{ { na, -1 },{ na, -1 },{ Port_E, 11 } },
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/* Pin 58*/{ { na, -1 },{ na, -1 },{ Port_E, 0 } },
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/* Pin 59*/{ { na, -1 },{ na, -1 },{ Port_E, 1 } },
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/* Pin 60*/{ { na, -1 },{ na, -1 },{ Port_E, 2 } },
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/* Pin 61*/{ { na, -1 },{ na, -1 },{ Port_E, 3 } },
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/* Pin 62*/{ { na, -1 },{ na, -1 },{ Port_E, 4 } },
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/* Pin 63*/{ { na, -1 },{ na, -1 },{ Port_E, 5 } },
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};
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}
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// Pin Mux constants
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enum pinMux
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{
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ALT0 = 0,
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ALT1, ALT2, ALT3, ALT4, ALT5, ALT6, ALT7
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};
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//-----------------------------------------------------------------------------------------------------
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// Pin class
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// all methods static, no instances will be generated in code
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template <unsigned pinNr>
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class pin
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{
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private:
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// Calculate the adress of the pin control register
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static constexpr uintptr_t get_PORTx_PCRn_addr()
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{
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static_assert(pinMap[pinNr][board].port != na && pinMap[pinNr][board].pin != -1, "Pin not supported by board");
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return PORTx_PCR0[(pinMap[pinNr][board]).port] + 4 * pinMap[pinNr][board].pin;
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}
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// Calculate the adress of the bit banded GPIO registers of the pin
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static constexpr uintptr_t getPDORAdr()
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{
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return 0x42000000 + 32 * (GPIOx_PDOR[pinMap[pinNr][board].port] - 0x40000000) + 4 * pinMap[pinNr][board].pin;
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}
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static constexpr uintptr_t pcr = get_PORTx_PCRn_addr(); // Pin Control Register
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static constexpr uintptr_t pdorBB = getPDORAdr(); // Bitband adress of GPIOx_PDOR
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static constexpr uintptr_t psorBB = pdorBB + 4 * 32; // GPIOx_PSOR = GPIOx_PDOR + 4
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static constexpr uintptr_t pcorBB = psorBB + 4 * 32; // GPIOx_PCOR = GPIOx_PDOR + 8
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static constexpr uintptr_t ptorBB = pcorBB + 4 * 32; // GPIOx_PTOR = GPIOx_PDOR + 12
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static constexpr uintptr_t pdirBB = ptorBB + 4 * 32; // GPIOx_PDIR = GPIOx_PDOR + 16
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static constexpr uintptr_t pddrBB = pdirBB + 4 * 32; // GPIOx_PDDR = GPIOx_PDOR + 20
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public:
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// Construction (class contains only static members)
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pin() {}
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pin(int i) { pinMode(i); }
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pin(const pin&) = delete; // disable copy constructor
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// Setting and getting the pin value
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template<class T, typename = typename std::enable_if<std::is_integral<T>::value>::type>
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operator T() const { return *reinterpret_cast<volatile uint32_t*>(pdirBB); }
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operator bool() const { return *reinterpret_cast<volatile uint32_t*>(pdirBB) & 1; }
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inline void operator = (const bool v) const { *reinterpret_cast<volatile uint32_t*>(pdorBB) = v; } // assignment --> somePin = HIGH
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inline void operator = (const pin& v) const = delete; // disable copying
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// Pin operations
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static inline void toggle() { *reinterpret_cast<volatile uint32_t*>(ptorBB) = 1; } // toggles pin
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//static inline int getValue() { return *reinterpret_cast<volatile uint32_t*>(pdirBB); } // returns pin value (usefull for static calls)
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//static inline void setValue(const int v) { *reinterpret_cast<volatile uint32_t*>(pdorBB) = v; } // sets value (usefull for static calls)
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//static inline void setHIGH() { *reinterpret_cast<volatile uint32_t*>(psorBB) = 1; } // sets pin to HIGH (usefull for static calls)
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//static inline void setLOW() { *reinterpret_cast<volatile uint32_t*>(pcorBB) = 1; } // sets pin to LOW (usefull for static calls)
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// Pin configuration
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static inline void pinMode(int mode)
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{
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// replace by a call to pinMode(pinNr,mode) ??? TBD
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switch (mode)
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{
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case OUTPUT:
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*reinterpret_cast<volatile uint32_t*>(pddrBB) = 1; //Pin direction register
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*reinterpret_cast<volatile uint32_t*>(pcr) = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1); //Pin control register
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break;
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case OUTPUT_OPENDRAIN:
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*reinterpret_cast<volatile uint32_t*>(pddrBB) = 1;
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*reinterpret_cast<volatile uint32_t*>(pcr) = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1) | PORT_PCR_ODE;
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break;
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case INPUT:
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*reinterpret_cast<volatile uint32_t*>(pddrBB) = 0;
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*reinterpret_cast<volatile uint32_t*>(pcr) = PORT_PCR_MUX(1);
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break;
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case INPUT_PULLUP:
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*reinterpret_cast<volatile uint32_t*>(pddrBB) = 0;
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*reinterpret_cast<volatile uint32_t*>(pcr) = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS;
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break;
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case INPUT_PULLDOWN:
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*reinterpret_cast<volatile uint32_t*>(pddrBB) = 0;
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*reinterpret_cast<volatile uint32_t*>(pcr) = PORT_PCR_MUX(1) | PORT_PCR_PE;
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break;
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case INPUT_DISABLE:
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*reinterpret_cast<volatile uint32_t*>(pcr) = 0;
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break;
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}
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}
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static inline void driveStrengthEnable(bool enable)
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{
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//TBD static_assert: pin has DSE capability
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if (enable) {
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*reinterpret_cast<uint32_t*>(pcr) |= PORT_PCR_DSE;
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}
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else {
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*reinterpret_cast<uint32_t*>(pcr) &= ~PORT_PCR_DSE;
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}
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}
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static inline void slowSlewRateEnable(bool enable)
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{
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//TBD static_assert: pin has SRE capability
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if (enable) {
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*reinterpret_cast<uint32_t*>(pcr) |= PORT_PCR_SRE;
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}
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else {
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*reinterpret_cast<uint32_t*>(pcr) &= ~PORT_PCR_SRE;
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}
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}
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static inline void setMUX(pinMux altFunc)
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{
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*reinterpret_cast<uint32_t*>(pcr) = (*reinterpret_cast<uint32_t*>(pcr) & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(altFunc);
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}
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static inline void attachInterrupt(void(*function)(void), int mode)
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{
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::attachInterrupt(pinNr, function, mode);
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}
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};
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}
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