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@ -114,7 +114,7 @@ class ActiveLowChipSelect : public AbstractChipSelect |
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}; |
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#if defined(__MK66FX1M0__) || (defined(__IMXRT1062__) && defined(ARDUINO_TEENSY_MICROMOD)) |
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#if defined(__MK66FX1M0__) || (defined(__IMXRT1062__) && (defined(ARDUINO_TEENSY_MICROMOD) || defined(ARDUINO_TEENSY41))) |
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class ActiveLowChipSelect1 : public AbstractChipSelect |
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{ |
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public: |
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@ -789,7 +789,7 @@ private: |
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}; |
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extern DmaSpi0 DMASPI0; |
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#if (defined(__IMXRT1062__) && defined(ARDUINO_TEENSY_MICROMOD)) |
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#if (defined(__IMXRT1062__) && (defined(ARDUINO_TEENSY_MICROMOD) || defined (ARDUINO_TEENSY41))) |
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// On T4.X, SPI1 is LPSPI3
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class DmaSpi1 : public AbstractDmaSpi<DmaSpi1, SPIClass, SPI1> |
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