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1025 lines
27 KiB
1025 lines
27 KiB
6 years ago
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#ifndef DMASPI_H
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#define DMASPI_H
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#include <Arduino.h>
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#include <util/atomic.h>
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#if(!defined(__arm__) && defined(TEENSYDUINO))
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#error This library is for teensyduino 1.21 on Teensy 3.0, 3.1 and Teensy LC only.
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#endif
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#include <SPI.h>
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#include "DMAChannel.h"
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#include <core_pins.h>
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/** \brief Specifies the desired CS suppression
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**/
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enum TransferType
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{
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NORMAL, //*< The transfer will use CS at beginning and end **/
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NO_START_CS, //*< Skip the CS activation at the start **/
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NO_END_CS //*< SKip the CS deactivation at the end **/
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};
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/** \brief An abstract base class that provides an interface for chip select classes.
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**/
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class AbstractChipSelect
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{
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public:
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/** \brief Called to select a chip. The implementing class can do other things as well.
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**/
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virtual void select(TransferType transferType = TransferType::NORMAL) = 0;
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/** \brief Called to deselect a chip. The implementing class can do other things as well.
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**/
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virtual void deselect(TransferType transferType = TransferType::NORMAL) = 0;
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/** \brief the virtual destructor needed to inherit from this class **/
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virtual ~AbstractChipSelect() {}
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};
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/** \brief "do nothing" chip select class **/
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class DummyChipSelect : public AbstractChipSelect
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{
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void select(TransferType transferType = TransferType::NORMAL) override {}
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void deselect(TransferType transferType = TransferType::NORMAL) override {}
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};
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/** \brief "do nothing" chip select class that
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* outputs a message through Serial when something happens
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**/
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class DebugChipSelect : public AbstractChipSelect
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{
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void select(TransferType transferType = TransferType::NORMAL) override {Serial.println("Debug CS: select()");}
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void deselect(TransferType transferType = TransferType::NORMAL) override {Serial.println("Debug CS: deselect()");}
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};
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/** \brief An active low chip select class. This also configures the given pin.
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* Warning: This class is hardcoded to manage a transaction on SPI (SPI0, that is).
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* If you want to use SPI1: Use AbstractChipSelect1 (see below)
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* If you want to use SPI2: Create AbstractChipSelect2 (adapt the implementation accordingly).
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* Something more flexible is on the way.
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**/
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class ActiveLowChipSelect : public AbstractChipSelect
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{
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public:
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/** Configures a chip select pin for OUTPUT mode,
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* manages the chip selection and a corresponding SPI transaction
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*
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* The chip select pin is asserted \e after the SPI settings are applied
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* and deasserted before the SPI transaction ends.
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* \param pin the CS pin to use
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* \param settings which SPI settings to apply when the chip is selected
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**/
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ActiveLowChipSelect(const unsigned int& pin, const SPISettings& settings)
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: pin_(pin),
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settings_(settings)
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{
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pinMode(pin, OUTPUT);
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digitalWriteFast(pin, 1);
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}
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/** \brief begins an SPI transaction selects the chip (sets the pin to low) and
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**/
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void select(TransferType transferType = TransferType::NORMAL) override
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{
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SPI.beginTransaction(settings_);
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if (transferType == TransferType::NO_START_CS) {
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return;
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}
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digitalWriteFast(pin_, 0);
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}
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/** \brief deselects the chip (sets the pin to high) and ends the SPI transaction
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**/
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void deselect(TransferType transferType = TransferType::NORMAL) override
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{
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if (transferType == TransferType::NO_END_CS) {
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} else {
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digitalWriteFast(pin_, 1);
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}
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SPI.endTransaction();
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}
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private:
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const unsigned int pin_;
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const SPISettings settings_;
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};
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#if defined(__MK66FX1M0__)
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class ActiveLowChipSelect1 : public AbstractChipSelect
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{
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public:
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/** Equivalent to AbstractChipSelect, but for SPI1.
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**/
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ActiveLowChipSelect1(const unsigned int& pin, const SPISettings& settings)
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: pin_(pin),
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settings_(settings)
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{
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pinMode(pin, OUTPUT);
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digitalWriteFast(pin, 1);
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}
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/** \brief begins an SPI transaction selects the chip (sets the pin to low) and
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**/
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void select(TransferType transferType = TransferType::NORMAL) override
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{
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SPI1.beginTransaction(settings_);
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if (transferType == TransferType::NO_START_CS) {
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return;
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}
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digitalWriteFast(pin_, 0);
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}
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/** \brief deselects the chip (sets the pin to high) and ends the SPI transaction
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**/
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void deselect(TransferType transferType = TransferType::NORMAL) override
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{
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if (transferType == TransferType::NO_END_CS) {
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} else {
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digitalWriteFast(pin_, 1);
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}
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SPI1.endTransaction();
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}
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private:
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const unsigned int pin_;
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const SPISettings settings_;
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};
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#endif
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//#define DEBUG_DMASPI 1
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#if defined(DEBUG_DMASPI)
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#define DMASPI_PRINT(x) do {Serial.printf x ; Serial.flush();} while (0);
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#else
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#define DMASPI_PRINT(x) do {} while (0);
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#endif
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namespace DmaSpi
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{
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/** \brief describes an SPI transfer
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*
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* Transfers are kept in a queue (intrusive linked list) until they are processed by the DmaSpi driver.
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*
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**/
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class Transfer
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{
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public:
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/** \brief The Transfer's current state.
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*
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**/
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enum State
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{
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idle, /**< The Transfer is idle, the DmaSpi has not seen it yet. **/
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eDone, /**< The Transfer is done. **/
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pending, /**< Queued, but not handled yet. **/
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inProgress, /**< The DmaSpi driver is currently busy executing this Transfer. **/
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error /**< An error occured. **/
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};
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/** \brief Creates a Transfer object.
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* \param pSource pointer to the data source. If this is nullptr, the fill value is used instead.
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* \param transferCount the number of SPI transfers to perform.
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* \param pDest pointer to the data sink. If this is nullptr, data received from the slave will be discarded.
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* \param fill if pSource is nullptr, this value is sent to the slave instead.
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* \param cs pointer to a chip select object.
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* If not nullptr, cs->select() is called when the Transfer is started and cs->deselect() is called when the Transfer is finished.
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**/
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Transfer(const uint8_t* pSource = nullptr,
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const uint16_t& transferCount = 0,
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volatile uint8_t* pDest = nullptr,
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const uint8_t& fill = 0,
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AbstractChipSelect* cs = nullptr,
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TransferType transferType = TransferType::NORMAL
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) : m_state(State::idle),
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m_pSource(pSource),
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m_transferCount(transferCount),
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m_pDest(pDest),
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m_fill(fill),
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m_pNext(nullptr),
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m_pSelect(cs),
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m_transferType(transferType)
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{
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DMASPI_PRINT(("Transfer @ %p\n", this));
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};
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/** \brief Check if the Transfer is busy, i.e. may not be modified.
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**/
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bool busy() const {return ((m_state == State::pending) || (m_state == State::inProgress) || (m_state == State::error));}
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/** \brief Check if the Transfer is done.
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**/
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bool done() const {return (m_state == State::eDone);}
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// private:
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volatile State m_state;
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const uint8_t* m_pSource;
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uint16_t m_transferCount;
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volatile uint8_t* m_pDest;
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uint8_t m_fill;
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Transfer* m_pNext;
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AbstractChipSelect* m_pSelect;
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TransferType m_transferType;
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};
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} // namespace DmaSpi
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template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
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class AbstractDmaSpi
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{
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public:
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using Transfer = DmaSpi::Transfer;
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/** \brief arduino-style initialization.
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*
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* During initialization, two DMA channels are allocated. If that fails, this function returns false.
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* If the channels could be allocated, those DMA channel fields that don't change during DMA SPI operation
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* are initialized to the values they will have at runtime.
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*
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* \return true if initialization was successful; false otherwise.
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* \see end()
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**/
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static bool begin()
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{
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if(init_count_ > 0)
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{
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return true; // this is not particularly bad, so we can return true
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}
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init_count_++;
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DMASPI_PRINT(("DmaSpi::begin() : "));
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// create DMA channels, might fail
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if (!createDmaChannels())
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{
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DMASPI_PRINT(("could not create DMA channels\n"));
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return false;
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}
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state_ = eStopped;
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// tx: known destination (SPI), no interrupt, finish silently
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begin_setup_txChannel();
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if (txChannel_()->error())
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{
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destroyDmaChannels();
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DMASPI_PRINT(("tx channel error\n"));
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return false;
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}
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// rx: known source (SPI), interrupt on completion
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begin_setup_rxChannel();
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if (rxChannel_()->error())
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{
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destroyDmaChannels();
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DMASPI_PRINT(("rx channel error\n"));
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return false;
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}
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return true;
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}
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static void begin_setup_txChannel() {DMASPI_INSTANCE::begin_setup_txChannel_impl();}
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static void begin_setup_rxChannel() {DMASPI_INSTANCE::begin_setup_rxChannel_impl();}
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/** \brief Allow the DMA SPI to start handling Transfers. This must be called after begin().
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* \see running()
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* \see busy()
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* \see stop()
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* \see stopping()
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* \see stopped()
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**/
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static void start()
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{
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DMASPI_PRINT(("DmaSpi::start() : state_ = "));
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switch(state_)
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{
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case eStopped:
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DMASPI_PRINT(("eStopped\n"));
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state_ = eRunning;
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beginPendingTransfer();
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break;
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case eRunning:
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DMASPI_PRINT(("eRunning\n"));
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break;
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case eStopping:
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DMASPI_PRINT(("eStopping\n"));
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state_ = eRunning;
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break;
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default:
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DMASPI_PRINT(("unknown\n"));
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state_ = eError;
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break;
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}
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}
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/** \brief check if the DMA SPI is in running state.
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* \return true if the DMA SPI is in running state, false otherwise.
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* \see start()
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* \see busy()
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* \see stop()
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* \see stopping()
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* \see stopped()
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**/
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static bool running() {return state_ == eRunning;}
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/** \brief register a Transfer to be handled by the DMA SPI.
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* \return false if the Transfer had an invalid transfer count (zero or greater than 32767), true otherwise.
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* \post the Transfer state is Transfer::State::pending, or Transfer::State::error if the transfer count was invalid.
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**/
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static bool registerTransfer(Transfer& transfer)
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{
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DMASPI_PRINT(("DmaSpi::registerTransfer(%p)\n", &transfer));
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if ((transfer.busy())
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|| (transfer.m_transferCount == 0) // no zero length transfers allowed
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|| (transfer.m_transferCount >= 0x8000)) // max CITER/BITER count with ELINK = 0 is 0x7FFF, so reject
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{
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DMASPI_PRINT((" Transfer is busy or invalid, dropped\n"));
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transfer.m_state = Transfer::State::error;
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return false;
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}
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addTransferToQueue(transfer);
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if ((state_ == eRunning) && (!busy()))
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{
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DMASPI_PRINT((" starting transfer\n"));
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
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{
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beginPendingTransfer();
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}
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}
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return true;
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}
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/** \brief Check if the DMA SPI is busy, which means that it is currently handling a Transfer.
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\return true if a Transfer is being handled.
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* \see start()
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* \see running()
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* \see stop()
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* \see stopping()
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* \see stopped()
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**/
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static bool busy()
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{
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return (m_pCurrentTransfer != nullptr);
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}
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/** \brief Request the DMA SPI to stop handling Transfers.
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*
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* The stopping driver may finish a current Transfer, but it will then not start a new, pending one.
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* \see start()
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* \see running()
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* \see busy()
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* \see stopping()
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* \see stopped()
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**/
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static void stop()
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{
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
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{
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switch(state_)
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{
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case eStopped:
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break;
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case eRunning:
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if (busy())
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{
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state_ = eStopping;
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}
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else
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{
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// this means that the DMA SPI simply has nothing to do
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state_ = eStopped;
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}
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break;
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case eStopping:
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break;
|
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default:
|
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state_ = eError;
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break;
|
||
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}
|
||
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}
|
||
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}
|
||
|
|
||
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/** \brief See if the DMA SPI is currently switching from running to stopped state
|
||
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* \return true if the DMA SPI is switching from running to stopped state
|
||
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* \see start()
|
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* \see running()
|
||
|
* \see busy()
|
||
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* \see stop()
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||
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* \see stopped()
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||
|
**/
|
||
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static bool stopping() { return (state_ == eStopping); }
|
||
|
|
||
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/** \brief See if the DMA SPI is stopped
|
||
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* \return true if the DMA SPI is in stopped state, i.e. not handling pending Transfers
|
||
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* \see start()
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||
|
* \see running()
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||
|
* \see busy()
|
||
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* \see stop()
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||
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* \see stopping()
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||
|
**/
|
||
|
static bool stopped() { return (state_ == eStopped); }
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|
||
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/** \brief Shut down the DMA SPI
|
||
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*
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* Deallocates DMA channels and sets the internal state to error (this might not be an intelligent name for that)
|
||
|
* \see begin()
|
||
|
**/
|
||
|
static void end()
|
||
|
{
|
||
|
if (init_count_ == 0)
|
||
|
{
|
||
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state_ = eError;
|
||
|
return;
|
||
|
}
|
||
|
if (init_count_ == 1)
|
||
|
{
|
||
|
init_count_--;
|
||
|
destroyDmaChannels();
|
||
|
state_ = eError;
|
||
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return;
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
init_count_--;
|
||
|
return;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/** \brief get the last value that was read from a slave, but discarded because the Transfer didn't specify a sink
|
||
|
**/
|
||
|
static uint8_t devNull()
|
||
|
{
|
||
|
return m_devNull;
|
||
|
}
|
||
|
|
||
|
protected:
|
||
|
enum EState
|
||
|
{
|
||
|
eStopped,
|
||
|
eRunning,
|
||
|
eStopping,
|
||
|
eError
|
||
|
};
|
||
|
|
||
|
static void addTransferToQueue(Transfer& transfer)
|
||
|
{
|
||
|
transfer.m_state = Transfer::State::pending;
|
||
|
transfer.m_pNext = nullptr;
|
||
|
DMASPI_PRINT((" DmaSpi::addTransferToQueue() : queueing transfer\n"));
|
||
|
ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
|
||
|
{
|
||
|
if (m_pNextTransfer == nullptr)
|
||
|
{
|
||
|
m_pNextTransfer = &transfer;
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
m_pLastTransfer->m_pNext = &transfer;
|
||
|
}
|
||
|
m_pLastTransfer = &transfer;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static void post_finishCurrentTransfer() {DMASPI_INSTANCE::post_finishCurrentTransfer_impl();}
|
||
|
|
||
|
static void finishCurrentTransfer()
|
||
|
{
|
||
|
if (m_pCurrentTransfer->m_pSelect != nullptr)
|
||
|
{
|
||
|
m_pCurrentTransfer->m_pSelect->deselect(m_pCurrentTransfer->m_transferType);
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
m_Spi.endTransaction();
|
||
|
}
|
||
|
m_pCurrentTransfer->m_state = Transfer::State::eDone;
|
||
|
DMASPI_PRINT((" finishCurrentTransfer() @ %p\n", m_pCurrentTransfer));
|
||
|
m_pCurrentTransfer = nullptr;
|
||
|
post_finishCurrentTransfer();
|
||
|
}
|
||
|
|
||
|
static bool createDmaChannels()
|
||
|
{
|
||
|
if (txChannel_() == nullptr)
|
||
|
{
|
||
|
return false;
|
||
|
}
|
||
|
if (rxChannel_() == nullptr)
|
||
|
{
|
||
|
delete txChannel_();
|
||
|
return false;
|
||
|
}
|
||
|
return true;
|
||
|
}
|
||
|
|
||
|
static void destroyDmaChannels()
|
||
|
{
|
||
|
if (rxChannel_() != nullptr)
|
||
|
{
|
||
|
delete rxChannel_();
|
||
|
}
|
||
|
if (txChannel_() != nullptr)
|
||
|
{
|
||
|
delete txChannel_();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static DMAChannel* rxChannel_()
|
||
|
{
|
||
|
static DMAChannel* pChannel = new DMAChannel();
|
||
|
return pChannel;
|
||
|
}
|
||
|
|
||
|
static DMAChannel* txChannel_()
|
||
|
{
|
||
|
static DMAChannel* pChannel = new DMAChannel();
|
||
|
return pChannel;
|
||
|
}
|
||
|
|
||
|
static void rxIsr_()
|
||
|
{
|
||
|
DMASPI_PRINT(("DmaSpi::rxIsr_()\n"));
|
||
|
rxChannel_()->clearInterrupt();
|
||
|
// end current transfer: deselect and mark as done
|
||
|
finishCurrentTransfer();
|
||
|
|
||
|
DMASPI_PRINT((" state = "));
|
||
|
switch(state_)
|
||
|
{
|
||
|
case eStopped: // this should not happen!
|
||
|
DMASPI_PRINT(("eStopped\n"));
|
||
|
state_ = eError;
|
||
|
break;
|
||
|
case eRunning:
|
||
|
DMASPI_PRINT(("eRunning\n"));
|
||
|
beginPendingTransfer();
|
||
|
break;
|
||
|
case eStopping:
|
||
|
DMASPI_PRINT(("eStopping\n"));
|
||
|
state_ = eStopped;
|
||
|
break;
|
||
|
case eError:
|
||
|
DMASPI_PRINT(("eError\n"));
|
||
|
break;
|
||
|
default:
|
||
|
DMASPI_PRINT(("eUnknown\n"));
|
||
|
state_ = eError;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static void pre_cs() {DMASPI_INSTANCE::pre_cs_impl();}
|
||
|
static void post_cs() {DMASPI_INSTANCE::post_cs_impl();}
|
||
|
|
||
|
static void beginPendingTransfer()
|
||
|
{
|
||
|
if (m_pNextTransfer == nullptr)
|
||
|
{
|
||
|
DMASPI_PRINT(("DmaSpi::beginNextTransfer: no pending transfer\n"));
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
m_pCurrentTransfer = m_pNextTransfer;
|
||
|
DMASPI_PRINT(("DmaSpi::beginNextTransfer: starting transfer @ %p\n", m_pCurrentTransfer));
|
||
|
m_pCurrentTransfer->m_state = Transfer::State::inProgress;
|
||
|
m_pNextTransfer = m_pNextTransfer->m_pNext;
|
||
|
if (m_pNextTransfer == nullptr)
|
||
|
{
|
||
|
DMASPI_PRINT((" this was the last in the queue\n"));
|
||
|
m_pLastTransfer = nullptr;
|
||
|
}
|
||
|
|
||
|
// configure Rx DMA
|
||
|
if (m_pCurrentTransfer->m_pDest != nullptr)
|
||
|
{
|
||
|
// real data sink
|
||
|
DMASPI_PRINT((" real sink\n"));
|
||
|
rxChannel_()->destinationBuffer(m_pCurrentTransfer->m_pDest,
|
||
|
m_pCurrentTransfer->m_transferCount);
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
// dummy data sink
|
||
|
DMASPI_PRINT((" dummy sink\n"));
|
||
|
rxChannel_()->destination(m_devNull);
|
||
|
rxChannel_()->transferCount(m_pCurrentTransfer->m_transferCount);
|
||
|
}
|
||
|
|
||
|
// configure Tx DMA
|
||
|
if (m_pCurrentTransfer->m_pSource != nullptr)
|
||
|
{
|
||
|
// real data source
|
||
|
DMASPI_PRINT((" real source\n"));
|
||
|
txChannel_()->sourceBuffer(m_pCurrentTransfer->m_pSource,
|
||
|
m_pCurrentTransfer->m_transferCount);
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
// dummy data source
|
||
|
DMASPI_PRINT((" dummy source\n"));
|
||
|
txChannel_()->source(m_pCurrentTransfer->m_fill);
|
||
|
txChannel_()->transferCount(m_pCurrentTransfer->m_transferCount);
|
||
|
}
|
||
|
|
||
|
pre_cs();
|
||
|
|
||
|
// Select Chip
|
||
|
if (m_pCurrentTransfer->m_pSelect != nullptr)
|
||
|
{
|
||
|
m_pCurrentTransfer->m_pSelect->select(m_pCurrentTransfer->m_transferType);
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
m_Spi.beginTransaction(SPISettings());
|
||
|
}
|
||
|
|
||
|
post_cs();
|
||
|
}
|
||
|
|
||
|
static size_t init_count_;
|
||
|
static volatile EState state_;
|
||
|
static Transfer* volatile m_pCurrentTransfer;
|
||
|
static Transfer* volatile m_pNextTransfer;
|
||
|
static Transfer* volatile m_pLastTransfer;
|
||
|
static volatile uint8_t m_devNull;
|
||
|
//static SPICLASS& m_Spi;
|
||
|
};
|
||
|
|
||
|
template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
|
||
|
size_t AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::init_count_ = 0;
|
||
|
|
||
|
template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
|
||
|
volatile typename AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::EState AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::state_ = eError;
|
||
|
|
||
|
template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
|
||
|
typename AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::Transfer* volatile AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::m_pNextTransfer = nullptr;
|
||
|
|
||
|
template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
|
||
|
typename AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::Transfer* volatile AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::m_pCurrentTransfer = nullptr;
|
||
|
|
||
|
template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
|
||
|
typename AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::Transfer* volatile AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::m_pLastTransfer = nullptr;
|
||
|
|
||
|
template<typename DMASPI_INSTANCE, typename SPICLASS, SPICLASS& m_Spi>
|
||
|
volatile uint8_t AbstractDmaSpi<DMASPI_INSTANCE, SPICLASS, m_Spi>::m_devNull = 0;
|
||
|
|
||
|
#if defined(KINETISK)
|
||
|
|
||
|
class DmaSpi0 : public AbstractDmaSpi<DmaSpi0, SPIClass, SPI>
|
||
|
{
|
||
|
public:
|
||
|
static void begin_setup_txChannel_impl()
|
||
|
{
|
||
|
txChannel_()->disable();
|
||
|
txChannel_()->destination((volatile uint8_t&)SPI0_PUSHR);
|
||
|
txChannel_()->disableOnCompletion();
|
||
|
txChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI0_TX);
|
||
|
}
|
||
|
|
||
|
static void begin_setup_rxChannel_impl()
|
||
|
{
|
||
|
rxChannel_()->disable();
|
||
|
rxChannel_()->source((volatile uint8_t&)SPI0_POPR);
|
||
|
rxChannel_()->disableOnCompletion();
|
||
|
rxChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI0_RX);
|
||
|
rxChannel_()->attachInterrupt(rxIsr_);
|
||
|
rxChannel_()->interruptAtCompletion();
|
||
|
}
|
||
|
|
||
|
static void pre_cs_impl()
|
||
|
{
|
||
|
SPI0_SR = 0xFF0F0000;
|
||
|
SPI0_RSER = SPI_RSER_RFDF_RE | SPI_RSER_RFDF_DIRS | SPI_RSER_TFFF_RE | SPI_RSER_TFFF_DIRS;
|
||
|
}
|
||
|
|
||
|
static void post_cs_impl()
|
||
|
{
|
||
|
rxChannel_()->enable();
|
||
|
txChannel_()->enable();
|
||
|
}
|
||
|
|
||
|
static void post_finishCurrentTransfer_impl()
|
||
|
{
|
||
|
SPI0_RSER = 0;
|
||
|
SPI0_SR = 0xFF0F0000;
|
||
|
}
|
||
|
|
||
|
private:
|
||
|
};
|
||
|
|
||
|
extern DmaSpi0 DMASPI0;
|
||
|
|
||
|
#if defined(__MK66FX1M0__)
|
||
|
|
||
|
class DmaSpi1 : public AbstractDmaSpi<DmaSpi1, SPIClass, SPI1>
|
||
|
{
|
||
|
public:
|
||
|
static void begin_setup_txChannel_impl()
|
||
|
{
|
||
|
txChannel_()->disable();
|
||
|
txChannel_()->destination((volatile uint8_t&)SPI1_PUSHR);
|
||
|
txChannel_()->disableOnCompletion();
|
||
|
txChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI1_TX);
|
||
|
}
|
||
|
|
||
|
static void begin_setup_rxChannel_impl()
|
||
|
{
|
||
|
rxChannel_()->disable();
|
||
|
rxChannel_()->source((volatile uint8_t&)SPI1_POPR);
|
||
|
rxChannel_()->disableOnCompletion();
|
||
|
rxChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI1_RX);
|
||
|
rxChannel_()->attachInterrupt(rxIsr_);
|
||
|
rxChannel_()->interruptAtCompletion();
|
||
|
}
|
||
|
|
||
|
static void pre_cs_impl()
|
||
|
{
|
||
|
SPI1_SR = 0xFF0F0000;
|
||
|
SPI1_RSER = SPI_RSER_RFDF_RE | SPI_RSER_RFDF_DIRS | SPI_RSER_TFFF_RE | SPI_RSER_TFFF_DIRS;
|
||
|
}
|
||
|
|
||
|
static void post_cs_impl()
|
||
|
{
|
||
|
rxChannel_()->enable();
|
||
|
txChannel_()->enable();
|
||
|
}
|
||
|
|
||
|
static void post_finishCurrentTransfer_impl()
|
||
|
{
|
||
|
SPI1_RSER = 0;
|
||
|
SPI1_SR = 0xFF0F0000;
|
||
|
}
|
||
|
|
||
|
private:
|
||
|
};
|
||
|
|
||
|
/*
|
||
|
class DmaSpi2 : public AbstractDmaSpi<DmaSpi2, SPIClass, SPI2>
|
||
|
{
|
||
|
public:
|
||
|
static void begin_setup_txChannel_impl()
|
||
|
{
|
||
|
txChannel_()->disable();
|
||
|
txChannel_()->destination((volatile uint8_t&)SPI2_PUSHR);
|
||
|
txChannel_()->disableOnCompletion();
|
||
|
txChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI2_TX);
|
||
|
}
|
||
|
|
||
|
static void begin_setup_rxChannel_impl()
|
||
|
{
|
||
|
rxChannel_()->disable();
|
||
|
rxChannel_()->source((volatile uint8_t&)SPI2_POPR);
|
||
|
rxChannel_()->disableOnCompletion();
|
||
|
rxChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI2_RX);
|
||
|
rxChannel_()->attachInterrupt(rxIsr_);
|
||
|
rxChannel_()->interruptAtCompletion();
|
||
|
}
|
||
|
|
||
|
static void pre_cs_impl()
|
||
|
{
|
||
|
SPI2_SR = 0xFF0F0000;
|
||
|
SPI2_RSER = SPI_RSER_RFDF_RE | SPI_RSER_RFDF_DIRS | SPI_RSER_TFFF_RE | SPI_RSER_TFFF_DIRS;
|
||
|
}
|
||
|
|
||
|
static void post_cs_impl()
|
||
|
{
|
||
|
rxChannel_()->enable();
|
||
|
txChannel_()->enable();
|
||
|
}
|
||
|
|
||
|
static void post_finishCurrentTransfer_impl()
|
||
|
{
|
||
|
SPI2_RSER = 0;
|
||
|
SPI2_SR = 0xFF0F0000;
|
||
|
}
|
||
|
|
||
|
private:
|
||
|
};
|
||
|
*/
|
||
|
|
||
|
extern DmaSpi1 DMASPI1;
|
||
|
//extern DmaSpi2 DMASPI2;
|
||
|
#endif // defined(__MK66FX1M0__)
|
||
|
|
||
|
#elif defined(KINETISL)
|
||
|
class DmaSpi0 : public AbstractDmaSpi<DmaSpi0, SPIClass, SPI>
|
||
|
{
|
||
|
public:
|
||
|
static void begin_setup_txChannel_impl()
|
||
|
{
|
||
|
txChannel_()->disable();
|
||
|
txChannel_()->destination((volatile uint8_t&)SPI0_DL);
|
||
|
txChannel_()->disableOnCompletion();
|
||
|
txChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI0_TX);
|
||
|
}
|
||
|
|
||
|
static void begin_setup_rxChannel_impl()
|
||
|
{
|
||
|
rxChannel_()->disable();
|
||
|
rxChannel_()->source((volatile uint8_t&)SPI0_DL);
|
||
|
rxChannel_()->disableOnCompletion();
|
||
|
rxChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI0_RX);
|
||
|
rxChannel_()->attachInterrupt(rxIsr_);
|
||
|
rxChannel_()->interruptAtCompletion();
|
||
|
}
|
||
|
|
||
|
static void pre_cs_impl()
|
||
|
{
|
||
|
// disable SPI and enable SPI DMA requests
|
||
|
SPI0_C1 &= ~(SPI_C1_SPE);
|
||
|
SPI0_C2 |= SPI_C2_TXDMAE | SPI_C2_RXDMAE;
|
||
|
}
|
||
|
|
||
|
static void post_cs_impl()
|
||
|
{
|
||
|
rxChannel_()->enable();
|
||
|
txChannel_()->enable();
|
||
|
}
|
||
|
|
||
|
static void post_finishCurrentTransfer_impl()
|
||
|
{
|
||
|
SPI0_C2 = 0;
|
||
|
txChannel_()->clearComplete();
|
||
|
rxChannel_()->clearComplete();
|
||
|
}
|
||
|
|
||
|
private:
|
||
|
};
|
||
|
|
||
|
class DmaSpi1 : public AbstractDmaSpi<DmaSpi1, SPIClass, SPI1>
|
||
|
{
|
||
|
public:
|
||
|
static void begin_setup_txChannel_impl()
|
||
|
{
|
||
|
txChannel_()->disable();
|
||
|
txChannel_()->destination((volatile uint8_t&)SPI1_DL);
|
||
|
txChannel_()->disableOnCompletion();
|
||
|
txChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI1_TX);
|
||
|
}
|
||
|
|
||
|
static void begin_setup_rxChannel_impl()
|
||
|
{
|
||
|
rxChannel_()->disable();
|
||
|
rxChannel_()->source((volatile uint8_t&)SPI1_DL);
|
||
|
rxChannel_()->disableOnCompletion();
|
||
|
rxChannel_()->triggerAtHardwareEvent(DMAMUX_SOURCE_SPI1_RX);
|
||
|
rxChannel_()->attachInterrupt(rxIsr_);
|
||
|
rxChannel_()->interruptAtCompletion();
|
||
|
}
|
||
|
|
||
|
static void pre_cs_impl()
|
||
|
{
|
||
|
// disable SPI and enable SPI DMA requests
|
||
|
SPI1_C1 &= ~(SPI_C1_SPE);
|
||
|
SPI1_C2 |= SPI_C2_TXDMAE | SPI_C2_RXDMAE;
|
||
|
}
|
||
|
|
||
|
// static void dumpCFG(const char *sz, uint32_t* p)
|
||
|
// {
|
||
|
// DMASPI_PRINT(("%s: %x %x %x %x \n", sz, p[0], p[1], p[2], p[3]));
|
||
|
// }
|
||
|
|
||
|
static void post_cs_impl()
|
||
|
{
|
||
|
DMASPI_PRINT(("post_cs S C1 C2: %x %x %x\n", SPI1_S, SPI1_C1, SPI1_C2));
|
||
|
// dumpCFG("RX", (uint32_t*)(void*)rxChannel_()->CFG);
|
||
|
// dumpCFG("TX", (uint32_t*)(void*)txChannel_()->CFG);
|
||
|
rxChannel_()->enable();
|
||
|
txChannel_()->enable();
|
||
|
}
|
||
|
|
||
|
static void post_finishCurrentTransfer_impl()
|
||
|
{
|
||
|
SPI1_C2 = 0;
|
||
|
txChannel_()->clearComplete();
|
||
|
rxChannel_()->clearComplete();
|
||
|
}
|
||
|
private:
|
||
|
};
|
||
|
|
||
|
extern DmaSpi0 DMASPI0;
|
||
|
extern DmaSpi1 DMASPI1;
|
||
|
|
||
|
#else
|
||
|
|
||
|
#error Unknown chip
|
||
|
|
||
|
#endif // KINETISK else KINETISL
|
||
|
|
||
|
class DmaSpiGeneric
|
||
|
{
|
||
|
public:
|
||
|
using Transfer = DmaSpi::Transfer;
|
||
|
|
||
|
DmaSpiGeneric() {
|
||
|
m_spiDma0 = &DMASPI0;
|
||
|
#if defined(__MK66FX1M0__)
|
||
|
m_spiDma1 = &DMASPI1;
|
||
|
#endif
|
||
|
}
|
||
|
DmaSpiGeneric(int spiId) : DmaSpiGeneric() {
|
||
|
m_spiSelect = spiId;
|
||
|
}
|
||
|
|
||
|
bool begin () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->begin();
|
||
|
default :
|
||
|
return m_spiDma0->begin();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void start () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : m_spiDma1->start(); return;
|
||
|
default :
|
||
|
m_spiDma0->start(); return;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
bool running () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->running();
|
||
|
default :
|
||
|
return m_spiDma0->running();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
bool registerTransfer (Transfer& transfer) {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->registerTransfer(transfer);
|
||
|
default :
|
||
|
return m_spiDma0->registerTransfer(transfer);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
|
||
|
bool busy () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->busy();
|
||
|
default :
|
||
|
return m_spiDma0->busy();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void stop () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : m_spiDma1->stop(); return;
|
||
|
default :
|
||
|
m_spiDma0->stop(); return;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
bool stopping () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->stopping();
|
||
|
default :
|
||
|
return m_spiDma0->stopping();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
bool stopped () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->stopped();
|
||
|
default :
|
||
|
return m_spiDma0->stopped();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void end () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : m_spiDma1->end(); return;
|
||
|
default :
|
||
|
m_spiDma0->end(); return;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
uint8_t devNull () {
|
||
|
switch(m_spiSelect) {
|
||
|
case 1 : return m_spiDma1->devNull();
|
||
|
default :
|
||
|
return m_spiDma0->devNull();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
private:
|
||
|
int m_spiSelect = 0;
|
||
|
DmaSpi0 *m_spiDma0 = nullptr;
|
||
|
#if defined(__MK66FX1M0__)
|
||
|
DmaSpi1 *m_spiDma1 = nullptr;
|
||
|
#else
|
||
|
// just make it Spi0 so it compiles atleast
|
||
|
DmaSpi0 *m_spiDma1 = nullptr;
|
||
|
#endif
|
||
|
|
||
|
};
|
||
|
|
||
|
|
||
|
#endif // DMASPI_H
|