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383 lines
14 KiB
383 lines
14 KiB
/*
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* File : uart.c
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* This file is part of Espressif's AT+ command set program.
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* Copyright (C) 2013 - 2016, Espressif Systems
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of version 3 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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* ----------------------------------------------------------------------------
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* Heavily modified and enhanced by Thorsten von Eicken in 2015
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*/
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#include "esp8266.h"
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#include "task.h"
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#include "uart.h"
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#ifdef UART_DBG
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#define DBG_UART(format, ...) os_printf(format, ## __VA_ARGS__)
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#else
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#define DBG_UART(format, ...) do { } while(0)
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#endif
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LOCAL uint8_t uart_recvTaskNum;
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LOCAL int8_t uart0_tx_enable_pin;
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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#define MAX_CB 4
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static UartRecv_cb uart_recv_cb[4];
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static void uart0_rx_intr_handler(void *para);
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/******************************************************************************
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* FunctionName : set_tx_enable_pin
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* Description : Set which pin to use for RS-485 TX_ENABLE
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* Parameters : pin, the pin to use
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_set_tx_enable_pin(int8_t pin) {
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uart0_tx_enable_pin = pin;
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}
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/******************************************************************************
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* FunctionName : tx_enable
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* Description : Internal used function
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* Set the TX_ENABLE line for RS-485 communications
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* Parameters : state, true if the TX_ENABLE line should be asserted high
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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tx_enable(bool state)
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{
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if (uart0_tx_enable_pin >= 0) {
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#ifdef SERBR_DBG
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os_printf("TX_ENABLE gpio%d state=%d\n", uart0_tx_enable_pin, (int)state);
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#endif
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GPIO_OUTPUT_SET(uart0_tx_enable_pin, (state) ? 1 : 0);
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}
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#ifdef SERBR_DBG
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else { os_printf("TX Enable: no pin\n"); }
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#endif
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}
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os_timer_t uart_tx_enable_timer;
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bool uart_tx_enable_timer_inited = false;
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/******************************************************************************
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* FunctionName : tx_completed_interrupt
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* Description : Internal used function
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* Set the TX enable line low, after the UART has completed tranmission
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* Parameters : unused unused
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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tx_completed_interrupt(void *unused)
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{
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os_timer_disarm(&uart_tx_enable_timer);
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tx_enable(false);
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}
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/******************************************************************************
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* FunctionName : uart_config
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* Description : Internal used function
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
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* UART1 just used for debug output
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart_config(uint8 uart_no, UartBautRate baudrate, uint32 conf0)
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{
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if (uart_no == UART1) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
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} else {
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/* rcv_buff size is 0x100 */
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, 0); // FUNC_U0RXD==0
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//PIN_PULLUP_DIS (PERIPHS_IO_MUX_U0TXD_U); now done in serbridgeInitPins
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//PIN_PULLUP_DIS (PERIPHS_IO_MUX_U0RXD_U);
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}
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uart_div_modify(uart_no, UART_CLK_FREQ / baudrate);
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if (uart_no == UART1) //UART 1 always 8 N 1
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conf0 = CALC_UARTMODE(EIGHT_BITS, NONE_BITS, ONE_STOP_BIT);
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WRITE_PERI_REG(UART_CONF0(uart_no), conf0);
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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if (uart_no == UART0) {
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// Configure RX interrupt conditions as follows: trigger rx-full when there are 80 characters
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// in the buffer, trigger rx-timeout when the fifo is non-empty and nothing further has been
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// received for 4 character periods.
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// Set the hardware flow-control to trigger when the FIFO holds 100 characters, although
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// we don't really expect the signals to actually be wired up to anything. It doesn't hurt
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// to set the threshold here...
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// We do not enable framing error interrupts 'cause they tend to cause an interrupt avalanche
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// and instead just poll for them when we get a std RX interrupt.
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uint32_t tx_empty_bits = 0;
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if (uart0_tx_enable_pin >= 0) {
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// Set the empty threshold to 0 and enable the buffer empty interrupt
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tx_empty_bits = (0 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S | UART_TXFIFO_EMPTY_INT_ENA;
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}
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((80 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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((100 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
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UART_RX_FLOW_EN |
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(4 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
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UART_RX_TOUT_EN) |
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tx_empty_bits
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;
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA);
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} else {
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
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}
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
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}
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/******************************************************************************
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* FunctionName : uart1_tx_one_char
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* Description : Internal used function
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* Use uart1 interface to transfer one char
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* Parameters : uint8 TxChar - character to tx
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* Returns : OK
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*******************************************************************************/
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STATUS
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uart_tx_one_char(uint8 uart, uint8 c)
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{
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//Wait until there is room in the FIFO
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while (((READ_PERI_REG(UART_STATUS(uart))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=100) ;
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//Send the character
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if (UART0 == uart && uart0_tx_enable_pin >= 0) {
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// A tx_completed_interrupt may have already been scheduled, cancel it before it fires during our transmission
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os_timer_disarm(&uart_tx_enable_timer);
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tx_enable(true);
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WRITE_PERI_REG(UART_FIFO(uart), c);
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SET_PERI_REG_MASK(UART_INT_ENA(uart), UART_TXFIFO_EMPTY_INT_ENA);
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} else {
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WRITE_PERI_REG(UART_FIFO(uart), c);
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}
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return OK;
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}
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/******************************************************************************
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* FunctionName : uart1_write_char
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* Description : Internal used function
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* Do some special deal while tx char is '\r' or '\n'
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* Parameters : char c - character to tx
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart1_write_char(char c)
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{
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//if (c == '\n') uart_tx_one_char(UART1, '\r');
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uart_tx_one_char(UART1, c);
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}
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void ICACHE_FLASH_ATTR
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uart0_write_char(char c)
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{
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//if (c == '\n') uart_tx_one_char(UART0, '\r');
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uart_tx_one_char(UART0, c);
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}
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/******************************************************************************
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* FunctionName : uart0_tx_buffer
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_tx_buffer(char *buf, uint16 len)
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{
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uint16 i;
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for (i = 0; i < len; i++)
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{
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uart_tx_one_char(UART0, buf[i]);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_sendStr
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_sendStr(const char *str)
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{
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while(*str)
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{
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uart_tx_one_char(UART0, *str++);
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}
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}
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static uint32 last_frm_err; // time in us when last framing error message was printed
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static int uart0_baud_rate = 0; // The baud rate for uart0
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler
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* Description : Internal used function
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* UART0 interrupt handler, add self handle code inside
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
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* Returns : NONE
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*******************************************************************************/
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static void // must not use ICACHE_FLASH_ATTR !
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uart0_rx_intr_handler(void *para)
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{
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// we assume that uart1 has interrupts disabled (it uses the same interrupt vector)
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uint8 uart_no = UART0;
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const uint32 one_sec = 1000000; // one second in usecs
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// we end up largely ignoring framing errors and we just print a warning every second max
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if (READ_PERI_REG(UART_INT_RAW(uart_no)) & UART_FRM_ERR_INT_RAW) {
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uint32 now = system_get_time();
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if (last_frm_err == 0 || (now - last_frm_err) > one_sec) {
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os_printf("UART framing error (bad baud rate?)\n");
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last_frm_err = now;
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}
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// clear rx fifo (apparently this is not optional at this point)
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST);
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// reset framing error
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WRITE_PERI_REG(UART_INT_CLR(UART0), UART_FRM_ERR_INT_CLR);
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// once framing errors are gone for 10 secs we forget about having seen them
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} else if (last_frm_err != 0 && (system_get_time() - last_frm_err) > 10*one_sec) {
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last_frm_err = 0;
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}
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if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)
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|| UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST))
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{
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//DBG_UART("stat:%02X",*(uint8 *)UART_INT_ENA(uart_no));
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ETS_UART_INTR_DISABLE();
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post_usr_task(uart_recvTaskNum, 0);
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} else if (UART_TXFIFO_EMPTY_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_TXFIFO_EMPTY_INT_ST)) {
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// TX Queue is empty, disable the TX_ENABLE line once the transmission is complete
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CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA);
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if (0 != uart0_baud_rate) {
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int tx_char_time = 8 * 1000000 / uart0_baud_rate; // assumes 8 bits per character
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os_timer_arm_us(&uart_tx_enable_timer, tx_char_time, false);
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}
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}
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}
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/******************************************************************************
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* FunctionName : uart_recvTask
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* Description : system task triggered on receive interrupt, empties FIFO and calls callbacks
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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uart_recvTask(os_event_t *events)
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{
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while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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//WRITE_PERI_REG(0X60000914, 0x73); //WTD // commented out by TvE
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// read a buffer-full from the uart
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uint16 length = 0;
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char buf[128];
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while ((READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) &&
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(length < 128)) {
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buf[length++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
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}
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//DBG_UART("%d ix %d\n", system_get_time(), length);
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for (int i=0; i<MAX_CB; i++) {
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if (uart_recv_cb[i] != NULL) (uart_recv_cb[i])(buf, length);
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}
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}
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WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
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ETS_UART_INTR_ENABLE();
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}
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// Turn UART interrupts off and poll for nchars or until timeout hits
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uint16_t ICACHE_FLASH_ATTR
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uart0_rx_poll(char *buff, uint16_t nchars, uint32_t timeout_us) {
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ETS_UART_INTR_DISABLE();
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uint16_t got = 0;
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uint32_t start = system_get_time(); // time in us
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while (system_get_time()-start < timeout_us) {
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while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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buff[got++] = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
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if (got == nchars) goto done;
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}
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}
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done:
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ETS_UART_INTR_ENABLE();
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return got;
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}
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void ICACHE_FLASH_ATTR
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uart0_baud(int rate) {
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uart0_baud_rate = rate;
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os_printf("UART %d baud\n", rate);
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uart_div_modify(UART0, UART_CLK_FREQ / rate);
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}
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void ICACHE_FLASH_ATTR
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uart0_config(uint8_t data_bits, uint8_t parity, uint8_t stop_bits) {
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uint32_t conf0 = CALC_UARTMODE(data_bits, parity, stop_bits);
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WRITE_PERI_REG(UART_CONF0(0), conf0);
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}
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/******************************************************************************
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* FunctionName : uart_init
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* Description : user interface for init uart
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* Parameters : UartBautRate uart0_br - uart0 bautrate
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* uart0TxEnablePin
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* UartBautRate uart1_br - uart1 bautrate
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart_init(uint32 conf0, UartBautRate uart0_br, int8_t uart0TxEnablePin, UartBautRate uart1_br)
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{
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if (uart0TxEnablePin >= 0) {
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uart0_set_tx_enable_pin(uart0TxEnablePin);
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// Set up a timer to disable the TX line after the last byte has been transmitted
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os_timer_disarm(&uart_tx_enable_timer);
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os_timer_setfn(&uart_tx_enable_timer, tx_completed_interrupt, NULL);
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}
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// rom use 74880 baut_rate, here reinitialize
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uart_config(UART0, uart0_br, conf0);
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uart_config(UART1, uart1_br, conf0);
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for (int i=0; i<4; i++) uart_tx_one_char(UART1, '\n');
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for (int i=0; i<4; i++) uart_tx_one_char(UART0, '\n');
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ETS_UART_INTR_ENABLE();
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// install uart1 putc callback
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os_install_putc1((void *)uart0_write_char);
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uart_recvTaskNum = register_usr_task(uart_recvTask);
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}
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void ICACHE_FLASH_ATTR
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uart_add_recv_cb(UartRecv_cb cb) {
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for (int i=0; i<MAX_CB; i++) {
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if (uart_recv_cb[i] == NULL) {
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uart_recv_cb[i] = cb;
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return;
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}
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}
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os_printf("UART: max cb count exceeded\n");
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}
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