diff --git a/esp-link/cgiflash.c b/esp-link/cgiflash.c index 1ce8469..0fe3feb 100644 --- a/esp-link/cgiflash.c +++ b/esp-link/cgiflash.c @@ -179,7 +179,7 @@ int ICACHE_FLASH_ATTR cgiRebootFirmware(HttpdConnData *connData) { system_upgrade_flag_set(UPGRADE_FLAG_FINISH); os_timer_disarm(&flash_reboot_timer); os_timer_setfn(&flash_reboot_timer, (os_timer_func_t *)system_upgrade_reboot, NULL); - os_timer_arm_us(&flash_reboot_timer, 2 * 1000000, 1); + os_timer_arm(&flash_reboot_timer, 2000, 1); return HTTPD_CGI_DONE; } @@ -193,6 +193,6 @@ int ICACHE_FLASH_ATTR cgiReset(HttpdConnData *connData) { // Schedule a reboot os_timer_disarm(&flash_reboot_timer); os_timer_setfn(&flash_reboot_timer, (os_timer_func_t *)system_restart, NULL); - os_timer_arm_us(&flash_reboot_timer, 2 * 1000000, 1); + os_timer_arm(&flash_reboot_timer, 2000, 1); return HTTPD_CGI_DONE; } diff --git a/esp-link/cgimega.c b/esp-link/cgimega.c index d5acec0..38fce83 100644 --- a/esp-link/cgimega.c +++ b/esp-link/cgimega.c @@ -25,7 +25,7 @@ * The number of data bytes in the record must match the number specified by the ll field. * cc is the checksum field that represents the checksum of the record. The checksum is * calculated by summing the values of all hexadecimal digit pairs in the record modulo - * 256 and taking the two's complement. + * 256 and taking the two's complement. * */ @@ -211,7 +211,7 @@ int ICACHE_FLASH_ATTR cgiMegaSync(HttpdConnData *connData) { allocateOptibootData(); DBG("OB got sync\n"); os_sprintf(buf, "SYNC at %d baud, board %02x.%02x.%02x, hardware v%d, firmware %d.%d", - baudRate, optibootData->signature[0], optibootData->signature[1], optibootData->signature[2], + baudRate, optibootData->signature[0], optibootData->signature[1], optibootData->signature[2], optibootData->hardwareVersion, optibootData->firmwareVersionMajor, optibootData->firmwareVersionMinor); httpdSend(connData, buf, -1); } else if (errMessage[0] && progState == stateSync) { @@ -375,7 +375,7 @@ static int ICACHE_FLASH_ATTR readPacket() { } return len; -} +} static int ICACHE_FLASH_ATTR readSyncPacket() { int len = readPacket(); diff --git a/esp-link/cgioptiboot.c b/esp-link/cgioptiboot.c index c94ac96..c3ca1ea 100644 --- a/esp-link/cgioptiboot.c +++ b/esp-link/cgioptiboot.c @@ -128,7 +128,7 @@ int ICACHE_FLASH_ATTR cgiOptibootSync(HttpdConnData *connData) { // start sync timer os_timer_disarm(&optibootTimer); os_timer_setfn(&optibootTimer, optibootTimerCB, NULL); - os_timer_arm_us(&optibootTimer, INIT_DELAY * 1000, 0); + os_timer_arm(&optibootTimer, INIT_DELAY, 0); // respond with optimistic OK noCacheHeaders(connData, 204); @@ -382,7 +382,7 @@ bool ICACHE_FLASH_ATTR optibootProgramPage(void) { static void ICACHE_FLASH_ATTR armTimer(uint32_t ms) { os_timer_disarm(&optibootTimer); - os_timer_arm_us(&optibootTimer, ms * 1000, 0); + os_timer_arm(&optibootTimer, ms, 0); } static int baudRates[] = { 0, 9600, 57600, 115200 }; diff --git a/esp-link/cgipins.c b/esp-link/cgipins.c index bf4754d..b763d12 100644 --- a/esp-link/cgipins.c +++ b/esp-link/cgipins.c @@ -32,10 +32,9 @@ int ICACHE_FLASH_ATTR cgiPinsGet(HttpdConnData *connData) { int len; len = os_sprintf(buff, - "{ \"reset\":%d, \"isp\":%d, \"conn\":%d, \"ser\":%d, \"swap\":%d, \"rxpup\":%d, \"txen\":%d }", + "{ \"reset\":%d, \"isp\":%d, \"conn\":%d, \"ser\":%d, \"swap\":%d, \"rxpup\":%d }", flashConfig.reset_pin, flashConfig.isp_pin, flashConfig.conn_led_pin, - flashConfig.ser_led_pin, !!flashConfig.swap_uart, !!flashConfig.rx_pullup, - flashConfig.tx_enable_pin); + flashConfig.ser_led_pin, !!flashConfig.swap_uart, !!flashConfig.rx_pullup); jsonHeader(connData, 200); httpdSend(connData, buff, len); @@ -49,7 +48,7 @@ int ICACHE_FLASH_ATTR cgiPinsSet(HttpdConnData *connData) { } int8_t ok = 0; - int8_t reset, isp, conn, ser, tx_enable; + int8_t reset, isp, conn, ser; uint8_t swap, rxpup; ok |= getInt8Arg(connData, "reset", &reset); ok |= getInt8Arg(connData, "isp", &isp); @@ -57,7 +56,6 @@ int ICACHE_FLASH_ATTR cgiPinsSet(HttpdConnData *connData) { ok |= getInt8Arg(connData, "ser", &ser); ok |= getBoolArg(connData, "swap", &swap); ok |= getBoolArg(connData, "rxpup", &rxpup); - ok |= getInt8Arg(connData, "txen", &tx_enable); if (ok < 0) return HTTPD_CGI_DONE; char *coll; @@ -77,10 +75,6 @@ int ICACHE_FLASH_ATTR cgiPinsSet(HttpdConnData *connData) { if (pins & (1<= 0) { - if (pins & (1<Second signal to program µC. AVR:not used, esp8266:gpio2, ARM:ISP -
- - - -
diff --git a/html/ui.js b/html/ui.js index eb50b4c..67361c9 100644 --- a/html/ui.js +++ b/html/ui.js @@ -393,12 +393,12 @@ function showNotification(text) { //===== GPIO Pin mux card var pinPresets = { - // array: reset, isp, conn, ser, swap, rxpup, txen - "esp-01": [ 0, -1, 2, -1, 0, 1, -1 ], - "esp-12": [ 12, 14, 0, 2, 0, 1, -1 ], - "esp-12 swap": [ 1, 3, 0, 2, 1, 1, -1 ], - "esp-bridge": [ 12, 13, 0, 14, 0, 0, -1 ], - "wifi-link-12": [ 1, 3, 0, 2, 1, 0, -1 ], + // array: reset, isp, conn, ser, swap, rxpup + "esp-01": [ 0, -1, 2, -1, 0, 1 ], + "esp-12": [ 12, 14, 0, 2, 0, 1 ], + "esp-12 swap": [ 1, 3, 0, 2, 1, 1 ], + "esp-bridge": [ 12, 13, 0, 14, 0, 0 ], + "wifi-link-12": [ 1, 3, 0, 2, 1, 0 ], }; function createPresets(sel) { @@ -418,7 +418,6 @@ function createPresets(sel) { setPP("ser", pp[3]); setPP("swap", pp[4]); $("#pin-rxpup").checked = !!pp[5]; - setPP("txen", pp[6]); sel.value = 0; }; @@ -454,7 +453,6 @@ function displayPins(resp) { createSelectForPin("ser", resp["ser"]); $("#pin-swap").value = resp["swap"]; $("#pin-rxpup").checked = !!resp["rxpup"]; - createSelectForPin("txen", resp["txen"]); createPresets($("#pin-preset")); $("#pin-spinner").setAttribute("hidden", ""); @@ -471,7 +469,7 @@ function setPins(ev) { ev.preventDefault(); var url = "/pins"; var sep = "?"; - ["reset", "isp", "conn", "ser", "swap", "txen"].forEach(function(p) { + ["reset", "isp", "conn", "ser", "swap"].forEach(function(p) { url += sep + p + "=" + $("#pin-"+p).value; sep = "&"; }); diff --git a/include/esp8266.h b/include/esp8266.h index 3cb71cf..9531dfe 100644 --- a/include/esp8266.h +++ b/include/esp8266.h @@ -18,7 +18,6 @@ #include #include -#define USE_US_TIMER #include #include diff --git a/mqtt/mqtt.c b/mqtt/mqtt.c index f6a557e..cce3436 100644 --- a/mqtt/mqtt.c +++ b/mqtt/mqtt.c @@ -703,7 +703,7 @@ MQTT_Connect(MQTT_Client* client) { // start timer function to tick every second os_timer_disarm(&client->mqttTimer); os_timer_setfn(&client->mqttTimer, (os_timer_func_t *)mqtt_timer, client); - os_timer_arm_us(&client->mqttTimer, 1 * 1000000, 1); + os_timer_arm(&client->mqttTimer, 1000, 1); // initiate the TCP connection or DNS lookup os_printf("MQTT: Connect to %s:%d %p (client=%p)\n", diff --git a/serial/serbridge.c b/serial/serbridge.c index 74d1fc1..7ba8e8e 100644 --- a/serial/serbridge.c +++ b/serial/serbridge.c @@ -18,7 +18,7 @@ static struct espconn serbridgeConn1; // plain bridging port static struct espconn serbridgeConn2; // programming port static esp_tcp serbridgeTcp1, serbridgeTcp2; -static int8_t mcu_reset_pin, mcu_isp_pin, tx_enable_pin; +static int8_t mcu_reset_pin, mcu_isp_pin; uint8_t in_mcu_flashing; // for disabling slip during MCU flashing @@ -557,10 +557,9 @@ serbridgeInitPins() { mcu_reset_pin = flashConfig.reset_pin; mcu_isp_pin = flashConfig.isp_pin; - tx_enable_pin = flashConfig.tx_enable_pin; #ifdef SERBR_DBG - os_printf("Serbridge pins: reset=%d isp=%d tx_enable=%d swap=%d\n", - mcu_reset_pin, mcu_isp_pin, tx_enable_pin, flashConfig.swap_uart); + os_printf("Serbridge pins: reset=%d isp=%d swap=%d\n", + mcu_reset_pin, mcu_isp_pin, flashConfig.swap_uart); #endif if (flashConfig.swap_uart) { @@ -579,25 +578,12 @@ serbridgeInitPins() system_uart_de_swap(); } - /* set both pins to 1 before turning them on (so we don't cause a reset) - * then switch pin mux to make these pins GPIO pins - */ - if (mcu_isp_pin >= 0) { - GPIO_OUTPUT_SET(mcu_isp_pin, 1); - makeGpio(mcu_isp_pin); - } - - if (mcu_reset_pin >= 0) { - GPIO_OUTPUT_SET(mcu_reset_pin, 1); - makeGpio(mcu_reset_pin); - } - - // set TX_ENABLE to 0 so we start up listening - if (tx_enable_pin >= 0) { - GPIO_OUTPUT_SET(tx_enable_pin, 0); - makeGpio(tx_enable_pin); - } - uart0_set_tx_enable_pin(tx_enable_pin); // must set to -1 if that's its value + // set both pins to 1 before turning them on so we don't cause a reset + if (mcu_isp_pin >= 0) GPIO_OUTPUT_SET(mcu_isp_pin, 1); + if (mcu_reset_pin >= 0) GPIO_OUTPUT_SET(mcu_reset_pin, 1); + // switch pin mux to make these pins GPIO pins + if (mcu_reset_pin >= 0) makeGpio(mcu_reset_pin); + if (mcu_isp_pin >= 0) makeGpio(mcu_isp_pin); } // Start transparent serial bridge TCP server on specified port (typ. 23) diff --git a/serial/serled.c b/serial/serled.c index 8d533e1..5bd66a2 100644 --- a/serial/serled.c +++ b/serial/serled.c @@ -25,7 +25,7 @@ void ICACHE_FLASH_ATTR serledFlash(int duration) { setSerled(1); os_timer_disarm(&serledTimer); os_timer_setfn(&serledTimer, serledTimerCb, NULL); - os_timer_arm_us(&serledTimer, duration * 1000, 0); + os_timer_arm(&serledTimer, duration, 0); } void ICACHE_FLASH_ATTR serledInit(void) { diff --git a/serial/uart.c b/serial/uart.c index 2580d3f..cb44ab0 100644 --- a/serial/uart.c +++ b/serial/uart.c @@ -28,7 +28,6 @@ #endif LOCAL uint8_t uart_recvTaskNum; -LOCAL int8_t uart0_tx_enable_pin; // UartDev is defined and initialized in rom code. extern UartDevice UartDev; @@ -37,53 +36,6 @@ static UartRecv_cb uart_recv_cb[4]; static void uart0_rx_intr_handler(void *para); -/****************************************************************************** - * FunctionName : set_tx_enable_pin - * Description : Set which pin to use for RS-485 TX_ENABLE - * Parameters : pin, the pin to use - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -uart0_set_tx_enable_pin(int8_t pin) { - uart0_tx_enable_pin = pin; -} - -/****************************************************************************** - * FunctionName : tx_enable - * Description : Internal used function - * Set the TX_ENABLE line for RS-485 communications - * Parameters : state, true if the TX_ENABLE line should be asserted high - * Returns : NONE -*******************************************************************************/ -static void ICACHE_FLASH_ATTR -tx_enable(bool state) -{ - if (uart0_tx_enable_pin >= 0) { - DBG_UART("TX_ENABLE gpio%d state=%d\n", uart0_tx_enable_pin, (int)state); - GPIO_OUTPUT_SET(uart0_tx_enable_pin, (state) ? 1 : 0); - } else { - DBG_UART("TX Enable: no pin\n"); - } -} - -os_timer_t uart_tx_enable_timer; -bool uart_tx_enable_timer_inited = false; - -/****************************************************************************** - * FunctionName : tx_completed_interrupt - * Description : Internal used function - * Set the TX enable line low, after the UART has completed tranmission - * Parameters : unused unused - * Returns : NONE -*******************************************************************************/ -static void ICACHE_FLASH_ATTR -tx_completed_interrupt(void *unused) -{ - os_timer_disarm(&uart_tx_enable_timer); - tx_enable(false); -} - - /****************************************************************************** * FunctionName : uart_config * Description : Internal used function @@ -126,20 +78,12 @@ uart_config(uint8 uart_no, UartBautRate baudrate, uint32 conf0) // to set the threshold here... // We do not enable framing error interrupts 'cause they tend to cause an interrupt avalanche // and instead just poll for them when we get a std RX interrupt. - - uint32_t tx_empty_bits = 0; - if (uart0_tx_enable_pin >= 0) { - // Set the empty threshold to 0 and enable the buffer empty interrupt - tx_empty_bits = (0 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S | UART_TXFIFO_EMPTY_INT_ENA; - } WRITE_PERI_REG(UART_CONF1(uart_no), ((80 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | ((100 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | UART_RX_FLOW_EN | (4 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | - UART_RX_TOUT_EN) | - tx_empty_bits - ; + UART_RX_TOUT_EN); SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA | UART_RXFIFO_TOUT_INT_ENA); } else { WRITE_PERI_REG(UART_CONF1(uart_no), @@ -164,16 +108,7 @@ uart_tx_one_char(uint8 uart, uint8 c) //Wait until there is room in the FIFO while (((READ_PERI_REG(UART_STATUS(uart))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=100) ; //Send the character - if (UART0 == uart && uart0_tx_enable_pin >= 0) { - // A tx_completed_interrupt may have already been scheduled, cancel it before it fires during our transmission - os_timer_disarm(&uart_tx_enable_timer); - - tx_enable(true); - WRITE_PERI_REG(UART_FIFO(uart), c); - SET_PERI_REG_MASK(UART_INT_ENA(uart), UART_TXFIFO_EMPTY_INT_ENA); - } else { - WRITE_PERI_REG(UART_FIFO(uart), c); - } + WRITE_PERI_REG(UART_FIFO(uart), c); return OK; } @@ -231,7 +166,6 @@ uart0_sendStr(const char *str) } static uint32 last_frm_err; // time in us when last framing error message was printed -static int uart0_baud_rate = 0; // The baud rate for uart0 /****************************************************************************** * FunctionName : uart0_rx_intr_handler @@ -270,13 +204,6 @@ uart0_rx_intr_handler(void *para) //DBG_UART("stat:%02X",*(uint8 *)UART_INT_ENA(uart_no)); ETS_UART_INTR_DISABLE(); post_usr_task(uart_recvTaskNum, 0); - } else if (UART_TXFIFO_EMPTY_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_TXFIFO_EMPTY_INT_ST)) { - // TX Queue is empty, disable the TX_ENABLE line once the transmission is complete - CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); - if (0 != uart0_baud_rate) { - int tx_char_time = 8 * 1000000 / uart0_baud_rate; // assumes 8 bits per character - os_timer_arm_us(&uart_tx_enable_timer, tx_char_time, false); - } } } @@ -326,7 +253,6 @@ done: void ICACHE_FLASH_ATTR uart0_baud(int rate) { - uart0_baud_rate = rate; os_printf("UART %d baud\n", rate); uart_div_modify(UART0, UART_CLK_FREQ / rate); } @@ -341,18 +267,12 @@ uart0_config(uint8_t data_bits, uint8_t parity, uint8_t stop_bits) { * FunctionName : uart_init * Description : user interface for init uart * Parameters : UartBautRate uart0_br - uart0 bautrate - * uart0TxEnablePin * UartBautRate uart1_br - uart1 bautrate * Returns : NONE *******************************************************************************/ void ICACHE_FLASH_ATTR -uart_init(uint32 conf0, UartBautRate uart0_br, int8_t uart0TxEnablePin, UartBautRate uart1_br) +uart_init(uint32 conf0, UartBautRate uart0_br, UartBautRate uart1_br) { - uart0_set_tx_enable_pin(uart0TxEnablePin); - // Set up a timer to disable the TX line after the last byte has been transmitted - os_timer_disarm(&uart_tx_enable_timer); - os_timer_setfn(&uart_tx_enable_timer, tx_completed_interrupt, NULL); - // rom use 74880 baut_rate, here reinitialize uart_config(UART0, uart0_br, conf0); uart_config(UART1, uart1_br, conf0); diff --git a/serial/uart.h b/serial/uart.h index a552565..f3fc2de 100644 --- a/serial/uart.h +++ b/serial/uart.h @@ -8,7 +8,7 @@ typedef void (*UartRecv_cb)(char *buf, short len); // Initialize UARTs to the provided baud rates (115200 recommended). This also makes the os_printf // calls use uart1 for output (for debugging purposes) -void uart_init(uint32 conf0, UartBautRate uart0_br, int8_t uart0TxEnablePin, UartBautRate uart1_br); +void uart_init(uint32 conf0, UartBautRate uart0_br, UartBautRate uart1_br); // Transmit a buffer of characters on UART0 void uart0_tx_buffer(char *buf, uint16 len); @@ -30,6 +30,4 @@ void uart0_baud(int rate); void uart0_config(uint8_t data_bits, uint8_t parity, uint8_t stop_bits); void uart_config(uint8 uart_no, UartBautRate baudrate, uint32 conf0); -void uart0_set_tx_enable_pin(int8_t pin); - #endif /* __UART_H__ */ diff --git a/syslog/syslog.c b/syslog/syslog.c index 3c8ae48..5c88901 100644 --- a/syslog/syslog.c +++ b/syslog/syslog.c @@ -91,7 +91,7 @@ static void ICACHE_FLASH_ATTR syslog_timer_arm(int delay) { syslog_timer_armed = true; os_timer_disarm(&wifi_chk_timer); os_timer_setfn(&wifi_chk_timer, (os_timer_func_t *)syslog_chk_status, NULL); - os_timer_arm_us(&wifi_chk_timer, delay * 1000, 0); + os_timer_arm(&wifi_chk_timer, delay, 0); } /******************************************************************************