From 9c1177686999a02101f39404c7e0fe432a7ad478 Mon Sep 17 00:00:00 2001 From: Thorsten von Eicken Date: Fri, 6 Nov 2015 23:52:17 -0800 Subject: [PATCH] switch to single firmware size --- Makefile | 21 ++------------------- esp-link/cgiflash.c | 24 ++++++++++++++++++++++++ esp-link/config.c | 24 +++++++++++++++--------- serial/serbridge.c | 2 +- 4 files changed, 42 insertions(+), 29 deletions(-) diff --git a/Makefile b/Makefile index 3602680..696fca7 100644 --- a/Makefile +++ b/Makefile @@ -97,12 +97,13 @@ YUI_COMPRESSOR ?= yuicompressor-2.4.8.jar HTML_PATH = $(abspath ./html)/ WIFI_PATH = $(HTML_PATH)wifi/ +ESP_FLASH_MAX ?= 503808 # max bin file + ifeq ("$(FLASH_SIZE)","512KB") # Winbond 25Q40 512KB flash, typ for esp-01 thru esp-11 ESP_SPI_SIZE ?= 0 # 0->512KB (256KB+256KB) ESP_FLASH_MODE ?= 0 # 0->QIO ESP_FLASH_FREQ_DIV ?= 0 # 0->40Mhz -ESP_FLASH_MAX ?= 241664 # max bin file for 512KB flash: 236KB ET_FS ?= 4m # 4Mbit flash size in esptool flash command ET_FF ?= 40m # 40Mhz flash speed in esptool flash command ET_BLANK ?= 0x7E000 # where to flash blank.bin to erase wireless settings @@ -112,7 +113,6 @@ else ifeq ("$(FLASH_SIZE)","1MB") ESP_SPI_SIZE ?= 2 # 2->1MB (512KB+512KB) ESP_FLASH_MODE ?= 0 # 0->QIO ESP_FLASH_FREQ_DIV ?= 15 # 15->80MHz -ESP_FLASH_MAX ?= 503808 # max bin file for 1MB flash: 492KB ET_FS ?= 8m # 8Mbit flash size in esptool flash command ET_FF ?= 80m # 80Mhz flash speed in esptool flash command ET_BLANK ?= 0xFE000 # where to flash blank.bin to erase wireless settings @@ -125,8 +125,6 @@ else ifeq ("$(FLASH_SIZE)","2MB") ESP_SPI_SIZE ?= 4 # 6->4MB (1MB+1MB) or 4->4MB (512KB+512KB) ESP_FLASH_MODE ?= 0 # 0->QIO, 2->DIO ESP_FLASH_FREQ_DIV ?= 15 # 15->80Mhz -ESP_FLASH_MAX ?= 503808 # max bin file for 512KB flash partition: 492KB -#ESP_FLASH_MAX ?= 1028096 # max bin file for 1MB flash partition: 1004KB ET_FS ?= 16m # 16Mbit flash size in esptool flash command ET_FF ?= 80m # 80Mhz flash speed in esptool flash command ET_BLANK ?= 0x1FE000 # where to flash blank.bin to erase wireless settings @@ -139,8 +137,6 @@ else ESP_SPI_SIZE ?= 4 # 6->4MB (1MB+1MB) or 4->4MB (512KB+512KB) ESP_FLASH_MODE ?= 0 # 0->QIO, 2->DIO ESP_FLASH_FREQ_DIV ?= 15 # 15->80Mhz -ESP_FLASH_MAX ?= 503808 # max bin file for 512KB flash partition: 492KB -#ESP_FLASH_MAX ?= 1028096 # max bin file for 1MB flash partition: 1004KB ET_FS ?= 32m # 32Mbit flash size in esptool flash command ET_FF ?= 80m # 80Mhz flash speed in esptool flash command ET_BLANK ?= 0x3FE000 # where to flash blank.bin to erase wireless settings @@ -396,18 +392,6 @@ endif # edit the loader script to add the espfs section to the end of irom with a 4 byte alignment. # we also adjust the sizes of the segments 'cause we need more irom0 -# in the end the only thing that matters wrt size is that the whole shebang fits into the -# 236KB available (in a 512KB flash) -ifeq ("$(FLASH_SIZE)","512KB") -build/eagle.esphttpd1.v6.ld: $(SDK_LDDIR)/eagle.app.v6.new.512.app1.ld - $(Q) sed -e '/\.irom\.text/{' -e 'a . = ALIGN (4);' -e 'a *(.espfs)' -e '}' \ - -e '/^ irom0_0_seg/ s/2B000/38000/' \ - $(SDK_LDDIR)/eagle.app.v6.new.512.app1.ld >$@ -build/eagle.esphttpd2.v6.ld: $(SDK_LDDIR)/eagle.app.v6.new.512.app2.ld - $(Q) sed -e '/\.irom\.text/{' -e 'a . = ALIGN (4);' -e 'a *(.espfs)' -e '}' \ - -e '/^ irom0_0_seg/ s/2B000/38000/' \ - $(SDK_LDDIR)/eagle.app.v6.new.512.app2.ld >$@ -else build/eagle.esphttpd1.v6.ld: $(SDK_LDDIR)/eagle.app.v6.new.1024.app1.ld $(Q) sed -e '/\.irom\.text/{' -e 'a . = ALIGN (4);' -e 'a *(.espfs)' -e '}' \ -e '/^ irom0_0_seg/ s/6B000/7C000/' \ @@ -416,7 +400,6 @@ build/eagle.esphttpd2.v6.ld: $(SDK_LDDIR)/eagle.app.v6.new.1024.app2.ld $(Q) sed -e '/\.irom\.text/{' -e 'a . = ALIGN (4);' -e 'a *(.espfs)' -e '}' \ -e '/^ irom0_0_seg/ s/6B000/7C000/' \ $(SDK_LDDIR)/eagle.app.v6.new.1024.app2.ld >$@ -endif espfs/mkespfsimage/mkespfsimage: espfs/mkespfsimage/ $(Q) $(MAKE) -C espfs/mkespfsimage GZIP_COMPRESSION="$(GZIP_COMPRESSION)" diff --git a/esp-link/cgiflash.c b/esp-link/cgiflash.c index ccd6865..2758aec 100644 --- a/esp-link/cgiflash.c +++ b/esp-link/cgiflash.c @@ -16,6 +16,7 @@ Some flash handling cgi routines. Used for reading the existing flash and updati #include #include +#include "cgi.h" #include "cgiflash.h" #include "espfs.h" @@ -33,10 +34,23 @@ static char* ICACHE_FLASH_ATTR check_header(void *buf) { return NULL; } +// check whether the flash map/size we have allows for OTA upgrade +static bool canOTA(void) { + enum flash_size_map map = system_get_flash_size_map(); + return map >= FLASH_SIZE_8M_MAP_512_512; +} + +static char *flash_too_small = "Flash too small for OTA update"; + //===== Cgi to query which firmware needs to be uploaded next int ICACHE_FLASH_ATTR cgiGetFirmwareNext(HttpdConnData *connData) { if (connData->conn==NULL) return HTTPD_CGI_DONE; // Connection aborted. Clean up. + if (!canOTA()) { + errorResponse(connData, 400, flash_too_small); + return HTTPD_CGI_DONE; + } + uint8 id = system_upgrade_userbin_check(); httpdStartResponse(connData, 200); httpdHeader(connData, "Content-Type", "text/plain"); @@ -55,6 +69,11 @@ int ICACHE_FLASH_ATTR cgiGetFirmwareNext(HttpdConnData *connData) { int ICACHE_FLASH_ATTR cgiUploadFirmware(HttpdConnData *connData) { if (connData->conn==NULL) return HTTPD_CGI_DONE; // Connection aborted. Clean up. + if (!canOTA()) { + errorResponse(connData, 400, flash_too_small); + return HTTPD_CGI_DONE; + } + int offset = connData->post->received - connData->post->buffLen; if (offset == 0) { connData->cgiPrivData = NULL; @@ -131,6 +150,11 @@ static ETSTimer flash_reboot_timer; int ICACHE_FLASH_ATTR cgiRebootFirmware(HttpdConnData *connData) { if (connData->conn==NULL) return HTTPD_CGI_DONE; // Connection aborted. Clean up. + if (!canOTA()) { + errorResponse(connData, 400, flash_too_small); + return HTTPD_CGI_DONE; + } + // sanity-check that the 'next' partition actually contains something that looks like // valid firmware uint8 id = system_upgrade_userbin_check(); diff --git a/esp-link/config.c b/esp-link/config.c index cd95e76..eb70a0f 100644 --- a/esp-link/config.c +++ b/esp-link/config.c @@ -35,9 +35,15 @@ typedef union { // size of the setting sector #define FLASH_SECT (4096) -// address where to flash the settings: there are 16KB of reserved space at the end of the first -// flash partition, we use the upper 8KB (2 sectors) -#define FLASH_ADDR (FLASH_SECT + FIRMWARE_SIZE + 2*FLASH_SECT) +// address where to flash the settings: if we have >512KB flash then there are 16KB of reserved +// space at the end of the first flash partition, we use the upper 8KB (2 sectors). If we only +// have 512KB then that space is used by the SDK and we use the 8KB just before that. +static uint32_t ICACHE_FLASH_ATTR flashAddr(void) { + enum flash_size_map map = system_get_flash_size_map(); + return map >= FLASH_SIZE_8M_MAP_512_512 + ? FLASH_SECT + FIRMWARE_SIZE + 2*FLASH_SECT // bootloader + firmware + 8KB free + : FLASH_SECT + FIRMWARE_SIZE - 2*FLASH_SECT;// bootloader + firmware - 8KB (risky...) +} static int flash_pri; // primary flash sector (0 or 1, or -1 for error) @@ -56,7 +62,7 @@ bool ICACHE_FLASH_ATTR configSave(void) { os_memcpy(&ff, &flashConfig, sizeof(FlashConfig)); uint32_t seq = ff.fc.seq+1; // erase secondary - uint32_t addr = FLASH_ADDR + (1-flash_pri)*FLASH_SECT; + uint32_t addr = flashAddr() + (1-flash_pri)*FLASH_SECT; if (spi_flash_erase_sector(addr>>12) != SPI_FLASH_RESULT_OK) goto fail; // no harm done, give up // calculate CRC @@ -76,7 +82,7 @@ bool ICACHE_FLASH_ATTR configSave(void) { if (spi_flash_write(addr, (void *)&ff, sizeof(uint32_t)) != SPI_FLASH_RESULT_OK) goto fail; // most likely failed, but no harm if successful // now that we have safely written the new version, erase old primary - addr = FLASH_ADDR + flash_pri*FLASH_SECT; + addr = flashAddr() + flash_pri*FLASH_SECT; flash_pri = 1-flash_pri; if (spi_flash_erase_sector(addr>>12) != SPI_FLASH_RESULT_OK) return true; // no back-up but we're OK @@ -95,8 +101,8 @@ fail: } void ICACHE_FLASH_ATTR configWipe(void) { - spi_flash_erase_sector(FLASH_ADDR>>12); - spi_flash_erase_sector((FLASH_ADDR+FLASH_SECT)>>12); + spi_flash_erase_sector(flashAddr()>>12); + spi_flash_erase_sector((flashAddr()+FLASH_SECT)>>12); } static int ICACHE_FLASH_ATTR selectPrimary(FlashFull *fc0, FlashFull *fc1); @@ -104,9 +110,9 @@ static int ICACHE_FLASH_ATTR selectPrimary(FlashFull *fc0, FlashFull *fc1); bool ICACHE_FLASH_ATTR configRestore(void) { FlashFull ff0, ff1; // read both flash sectors - if (spi_flash_read(FLASH_ADDR, (void *)&ff0, sizeof(ff0)) != SPI_FLASH_RESULT_OK) + if (spi_flash_read(flashAddr(), (void *)&ff0, sizeof(ff0)) != SPI_FLASH_RESULT_OK) os_memset(&ff0, 0, sizeof(ff0)); // clear in case of error - if (spi_flash_read(FLASH_ADDR+FLASH_SECT, (void *)&ff1, sizeof(ff1)) != SPI_FLASH_RESULT_OK) + if (spi_flash_read(flashAddr()+FLASH_SECT, (void *)&ff1, sizeof(ff1)) != SPI_FLASH_RESULT_OK) os_memset(&ff1, 0, sizeof(ff1)); // clear in case of error // figure out which one is good flash_pri = selectPrimary(&ff0, &ff1); diff --git a/serial/serbridge.c b/serial/serbridge.c index c4008a6..0f812d9 100644 --- a/serial/serbridge.c +++ b/serial/serbridge.c @@ -398,7 +398,7 @@ serbridgeConnectCb(void *arg) int i; for (i=0; itcp.local_port ,conn, i); + os_printf("Accept port %d, conn=%p, pool slot %d\n", conn->proto.tcp->local_port, conn, i); #endif if (i==MAX_CONN) {