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/*
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* ***** output_i2s_f32.cpp ***** |
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* |
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* Audio Library for Teensy 3.X |
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* Copyright (c) 2014, Paul Stoffregen, paul@pjrc.com |
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* |
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* Development of this audio library was funded by PJRC.COM, LLC by sales of |
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* Teensy and Audio Adaptor boards. Please support PJRC's efforts to develop |
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* open source software by purchasing Teensy or other PJRC products. |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a copy |
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* of this software and associated documentation files (the "Software"), to deal |
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* in the Software without restriction, including without limitation the rights |
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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* copies of the Software, and to permit persons to whom the Software is |
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* furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice, development funding notice, and this permission |
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* notice shall be included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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* THE SOFTWARE. |
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*/ |
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/*
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* Extended by Chip Audette, OpenAudio, May 2019 |
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* Converted to F32 and to variable audio block length |
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* The F32 conversion is under the MIT License. Use at your own risk. |
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*/ |
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// Updated OpenAudio F32 with this version from Chip Audette's Tympan Library Jan 2021 RSL
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// Removed old commented out code. RSL 30 May 2022
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#include "output_i2s2_f32.h" |
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#include <arm_math.h> |
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#include <Audio.h> //to get access to Audio/utlity/imxrt_hw.h...do we really need this??? WEA 2020-10-31 |
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float AudioOutputI2S2_F32::setI2SFreq_T3(const float freq_Hz) { |
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return 0.0f; |
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} |
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audio_block_f32_t * AudioOutputI2S2_F32::block_left_1st = NULL; |
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audio_block_f32_t * AudioOutputI2S2_F32::block_right_1st = NULL; |
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audio_block_f32_t * AudioOutputI2S2_F32::block_left_2nd = NULL; |
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audio_block_f32_t * AudioOutputI2S2_F32::block_right_2nd = NULL; |
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uint16_t AudioOutputI2S2_F32::block_left_offset = 0; |
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uint16_t AudioOutputI2S2_F32::block_right_offset = 0; |
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bool AudioOutputI2S2_F32::update_responsibility = false; |
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DMAChannel AudioOutputI2S2_F32::dma(false); |
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DMAMEM __attribute__((aligned(32))) static uint64_t i2s2_tx_buffer[AUDIO_BLOCK_SAMPLES]; |
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//DMAMEM static int32_t i2s2_tx_buffer[2*AUDIO_BLOCK_SAMPLES]; //2 channels at 32-bits per sample. Local "audio_block_samples" should be no larger than global "AUDIO_BLOCK_SAMPLES"
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float AudioOutputI2S2_F32::sample_rate_Hz = AUDIO_SAMPLE_RATE; |
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int AudioOutputI2S2_F32::audio_block_samples = AUDIO_BLOCK_SAMPLES; |
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#if defined(__IMXRT1062__) |
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#include <utility/imxrt_hw.h> //from Teensy Audio library. For set_audioClock() |
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#endif |
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//#for 16-bit transfers
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#define I2S_BUFFER_TO_USE_BYTES (AudioOutputI2S2_F32::audio_block_samples*sizeof(i2s2_tx_buffer[0])) |
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//#for 32-bit transfers
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//#define I2S_BUFFER_TO_USE_BYTES (AudioOutputI2S2_F32::audio_block_samples*2*sizeof(i2s2_tx_buffer[0]))
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void AudioOutputI2S2_F32::begin(void) |
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{ |
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bool transferUsing32bit = false; |
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begin(transferUsing32bit); |
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} |
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void AudioOutputI2S2_F32::begin(bool transferUsing32bit) { |
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dma.begin(true); // Allocate the DMA channel first
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block_left_1st = NULL; |
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block_right_1st = NULL; |
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AudioOutputI2S2_F32::config_i2s(transferUsing32bit, sample_rate_Hz); |
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// if AudioInputI2S2 set I2S_TCSR_TE (for clock sync), disable it
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I2S2_TCSR = 0; |
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while (I2S2_TCSR & I2S_TCSR_TE) ; //wait for transmit disabled
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CORE_PIN2_CONFIG = 2; //EMC_04, 2=SAI2_TX_DATA, page 428
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dma.TCD->SADDR = i2s2_tx_buffer; |
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dma.TCD->SOFF = 4; |
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dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(2) | DMA_TCD_ATTR_DSIZE(2); |
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dma.TCD->NBYTES_MLNO = 4; |
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//dma.TCD->SLAST = -sizeof(i2s2_tx_buffer);//orig from Teensy Audio Library 2020-10-31
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dma.TCD->SLAST = -I2S_BUFFER_TO_USE_BYTES; |
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dma.TCD->DOFF = 0; |
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//dma.TCD->CITER_ELINKNO = sizeof(i2s2_tx_buffer) / 2; //orig from Teensy Audio Library 2020-10-31
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dma.TCD->CITER_ELINKNO = I2S_BUFFER_TO_USE_BYTES / 4; |
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dma.TCD->DLASTSGA = 0; |
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//dma.TCD->BITER_ELINKNO = sizeof(i2s2_tx_buffer) / 2;//orig from Teensy Audio Library 2020-10-31
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dma.TCD->BITER_ELINKNO = I2S_BUFFER_TO_USE_BYTES / 4; |
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dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
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dma.TCD->DADDR = (void *)((uint32_t)&I2S2_TDR0 + 0); |
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dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SAI2_TX); |
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dma.enable(); //newer location of this line in Teensy Audio library
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// I2S1_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE; // from output_i2s_f32.cpp
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// I2S1_TCSR = I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE; // from output_i2s_f32.cpp
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I2S2_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; |
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update_responsibility = update_setup(); |
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dma.attachInterrupt(AudioOutputI2S2_F32::isr); |
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//dma.enable(); //original location of this line in older Tympan_Library
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enabled = 1; |
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//AudioInputI2S_F32::begin_guts();
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} |
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void AudioOutputI2S2_F32::isr(void) |
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{ |
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int32_t *dest; |
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audio_block_f32_t *blockL, *blockR; |
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uint32_t saddr, offsetL, offsetR; |
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saddr = (uint32_t)(dma.TCD->SADDR); |
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dma.clearInterrupt(); |
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//if (saddr < (uint32_t)i2s2_tx_buffer + sizeof(i2s2_tx_buffer) / 2) { //original 16-bit
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if (saddr < (uint32_t)i2s2_tx_buffer + I2S_BUFFER_TO_USE_BYTES / 2) { //are we transmitting the first half or second half of the buffer?
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// DMA is transmitting the first half of the buffer
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// so we must fill the second half
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//dest = (int16_t *)&i2s2_tx_buffer[AUDIO_BLOCK_SAMPLES/2]; //original Teensy Audio
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dest = (int32_t *)&i2s2_tx_buffer[audio_block_samples/2]; //this will be diff if we were to do 32-bit samples
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if (AudioOutputI2S2_F32::update_responsibility) AudioStream_F32::update_all(); |
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} else { |
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// DMA is transmitting the second half of the buffer
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// so we must fill the first half
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dest = (int32_t *)i2s2_tx_buffer; |
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} |
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blockL = AudioOutputI2S2_F32::block_left_1st; |
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blockR = AudioOutputI2S2_F32::block_right_1st; |
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offsetL = AudioOutputI2S2_F32::block_left_offset; |
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offsetR = AudioOutputI2S2_F32::block_right_offset; |
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int32_t *d = dest; |
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if (blockL && blockR) { |
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//memcpy_tointerleaveLR(dest, blockL->data + offsetL, blockR->data + offsetR);
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//memcpy_tointerleaveLRwLen(dest, blockL->data + offsetL, blockR->data + offsetR, audio_block_samples/2);
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float32_t *pL = blockL->data + offsetL; |
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float32_t *pR = blockR->data + offsetR; |
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for (int i=0; i < audio_block_samples/2; i++) { |
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*d++ = (int32_t) *pL++; |
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*d++ = (int32_t) *pR++; //interleave
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//*d++ = 0;
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//*d++ = 0;
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} |
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offsetL += audio_block_samples / 2; |
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offsetR += audio_block_samples / 2; |
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} else if (blockL) { |
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//memcpy_tointerleaveLR(dest, blockL->data + offsetL, blockR->data + offsetR);
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float32_t *pL = blockL->data + offsetL; |
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for (int i=0; i < audio_block_samples / 2 * 2; i+=2) { *(d+i) = (int32_t) *pL++; } //interleave
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offsetL += audio_block_samples / 2; |
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} else if (blockR) { |
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float32_t *pR = blockR->data + offsetR; |
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for (int i=0; i < audio_block_samples /2 * 2; i+=2) { *(d+i) = (int32_t) *pR++; } //interleave
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offsetR += audio_block_samples / 2; |
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} else { |
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//memset(dest,0,AUDIO_BLOCK_SAMPLES * 2);
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memset(dest,0,audio_block_samples * 4); |
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return; |
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} |
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arm_dcache_flush_delete(dest, sizeof(i2s2_tx_buffer) / 2 ); |
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//if (offsetL < AUDIO_BLOCK_SAMPLES) { //orig Teensy Audio
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if (offsetL < (uint16_t)audio_block_samples) { |
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AudioOutputI2S2_F32::block_left_offset = offsetL; |
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} else { |
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AudioOutputI2S2_F32::block_left_offset = 0; |
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AudioStream_F32::release(blockL); |
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AudioOutputI2S2_F32::block_left_1st = AudioOutputI2S2_F32::block_left_2nd; |
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AudioOutputI2S2_F32::block_left_2nd = NULL; |
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} |
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//if (offsetR < AUDIO_BLOCK_SAMPLES) { //orig Teensy Audio
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if (offsetR < (uint16_t)audio_block_samples) { |
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AudioOutputI2S2_F32::block_right_offset = offsetR; |
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} else { |
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AudioOutputI2S2_F32::block_right_offset = 0; |
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AudioStream_F32::release(blockR); |
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AudioOutputI2S2_F32::block_right_1st = AudioOutputI2S2_F32::block_right_2nd; |
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AudioOutputI2S2_F32::block_right_2nd = NULL; |
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} |
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} |
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#define F32_TO_I16_NORM_FACTOR (32767) //which is 2^15-1
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void AudioOutputI2S2_F32::scale_f32_to_i16(float32_t *p_f32, float32_t *p_i16, int len) { |
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for (int i=0; i<len; i++) { *p_i16++ = max(-F32_TO_I16_NORM_FACTOR,min(F32_TO_I16_NORM_FACTOR,(*p_f32++) * F32_TO_I16_NORM_FACTOR)); } |
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} |
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#define F32_TO_I24_NORM_FACTOR (8388607) //which is 2^23-1
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void AudioOutputI2S2_F32::scale_f32_to_i24( float32_t *p_f32, float32_t *p_i24, int len) { |
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for (int i=0; i<len; i++) { *p_i24++ = max(-F32_TO_I24_NORM_FACTOR,min(F32_TO_I24_NORM_FACTOR,(*p_f32++) * F32_TO_I24_NORM_FACTOR)); } |
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} |
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#define F32_TO_I32_NORM_FACTOR (2147483647) //which is 2^31-1
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//define F32_TO_I32_NORM_FACTOR (8388607) //which is 2^23-1
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void AudioOutputI2S2_F32::scale_f32_to_i32( float32_t *p_f32, float32_t *p_i32, int len) { |
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for (int i=0; i<len; i++) { *p_i32++ = max(-F32_TO_I32_NORM_FACTOR,min(F32_TO_I32_NORM_FACTOR,(*p_f32++) * F32_TO_I32_NORM_FACTOR)); } |
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//for (int i=0; i<len; i++) { *p_i32++ = (*p_f32++) * F32_TO_I32_NORM_FACTOR + 512.f*8388607.f; }
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} |
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//update has to be carefully coded so that, if audio_blocks are not available, the code exits
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//gracefully and won't hang. That'll cause the whole system to hang, which would be very bad.
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//static int count = 0;
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void AudioOutputI2S2_F32::update(void) |
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{ |
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// null audio device: discard all incoming data
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//if (!active) return;
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//audio_block_t *block = receiveReadOnly();
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//if (block) release(block);
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audio_block_f32_t *block_f32; |
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audio_block_f32_t *block_f32_scaled = AudioStream_F32::allocate_f32(); |
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audio_block_f32_t *block2_f32_scaled = AudioStream_F32::allocate_f32(); |
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if ((!block_f32_scaled) || (!block2_f32_scaled)) { |
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//couldn't get some working memory. Return.
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if (block_f32_scaled) AudioStream_F32::release(block_f32_scaled); |
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if (block2_f32_scaled) AudioStream_F32::release(block2_f32_scaled); |
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return; |
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} |
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//now that we have our working memory, proceed with getting the audio data and processing
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block_f32 = receiveReadOnly_f32(0); // input 0 = left channel
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if (block_f32) { |
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if (block_f32->length != audio_block_samples) { |
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Serial.print("AudioOutputI2S2_F32: *** WARNING ***: audio_block says len = "); |
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Serial.print(block_f32->length); |
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Serial.print(", but I2S settings want it to be = "); |
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Serial.println(audio_block_samples); |
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} |
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//Serial.print("AudioOutputI2S2_F32: audio_block_samples = ");
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//Serial.println(audio_block_samples);
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// Optional scaling for easy volume control. Leave outputScale==1.0f for default
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if(outputScale<1.0f || outputScale>1.0f) |
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arm_scale_f32 (block_f32->data, outputScale, block_f32->data, block_f32->length); |
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//scale F32 to Int32
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//block_f32_scaled = AudioStream_F32::allocate_f32();
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scale_f32_to_i32(block_f32->data, block_f32_scaled->data, audio_block_samples); |
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//scale_f32_to_i16(block_f32->data, block_f32_scaled->data, audio_block_samples);
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//now process the data blocks
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__disable_irq(); |
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if (block_left_1st == NULL) { |
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block_left_1st = block_f32_scaled; |
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block_left_offset = 0; |
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__enable_irq(); |
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} else if (block_left_2nd == NULL) { |
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block_left_2nd = block_f32_scaled; |
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__enable_irq(); |
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|
} else { |
|
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audio_block_f32_t *tmp = block_left_1st; |
|
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block_left_1st = block_left_2nd; |
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block_left_2nd = block_f32_scaled; |
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block_left_offset = 0; |
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__enable_irq(); |
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AudioStream_F32::release(tmp); |
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} |
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AudioStream_F32::transmit(block_f32,0); AudioStream_F32::release(block_f32); //echo the incoming audio out the outputs
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} else { |
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//this branch should never get called, but if it does, let's release the buffer that was never used
|
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AudioStream_F32::release(block_f32_scaled); |
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} |
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block_f32_scaled = block2_f32_scaled; //this is simply renaming the pre-allocated buffer
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block_f32 = receiveReadOnly_f32(1); // input 1 = right channel
|
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if (block_f32) { |
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// Optional scaling for easy volume control. Leave outputScale==1.0f for default
|
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if(outputScale<1.0f || outputScale>1.0f) |
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arm_scale_f32 (block_f32->data, outputScale, block_f32->data, block_f32->length); |
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//scale F32 to Int32
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//block_f32_scaled = AudioStream_F32::allocate_f32();
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scale_f32_to_i32(block_f32->data, block_f32_scaled->data, audio_block_samples); |
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//scale_f32_to_i16(block_f32->data, block_f32_scaled->data, audio_block_samples);
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__disable_irq(); |
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if (block_right_1st == NULL) { |
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block_right_1st = block_f32_scaled; |
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block_right_offset = 0; |
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__enable_irq(); |
|
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|
} else if (block_right_2nd == NULL) { |
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block_right_2nd = block_f32_scaled; |
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__enable_irq(); |
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} else { |
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audio_block_f32_t *tmp = block_right_1st; |
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block_right_1st = block_right_2nd; |
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block_right_2nd = block_f32_scaled; |
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block_right_offset = 0; |
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|
__enable_irq(); |
|
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|
AudioStream_F32::release(tmp); |
|
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|
} |
|
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|
AudioStream_F32::transmit(block_f32,1); AudioStream_F32::release(block_f32); //echo the incoming audio out the outputs
|
|
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|
|
} else { |
|
|
|
|
//this branch should never get called, but if it does, let's release the buffer that was never used
|
|
|
|
|
AudioStream_F32::release(block_f32_scaled); |
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|
} |
|
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|
|
} |
|
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void AudioOutputI2S2_F32::config_i2s(void) { config_i2s(false, AudioOutputI2S2_F32::sample_rate_Hz); } |
|
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void AudioOutputI2S2_F32::config_i2s(bool transferUsing32bit) { config_i2s(transferUsing32bit, AudioOutputI2S2_F32::sample_rate_Hz); } |
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void AudioOutputI2S2_F32::config_i2s(float fs_Hz) { config_i2s(false, fs_Hz); } |
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void AudioOutputI2S2_F32::config_i2s(bool transferUsing32bit, float fs_Hz) |
|
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|
|
{ |
|
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|
CCM_CCGR5 |= CCM_CCGR5_SAI2(CCM_CCGR_ON); |
|
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// if either transmitter or receiver is enabled, do nothing
|
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if (I2S2_TCSR & I2S_TCSR_TE) return; |
|
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if (I2S2_RCSR & I2S_RCSR_RE) return; |
|
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|
|
//PLL:
|
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//int fs = AUDIO_SAMPLE_RATE_EXACT; //original from Teensy Audio Library
|
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int fs = fs_Hz; |
|
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|
// PLL between 27*24 = 648MHz und 54*24=1296MHz
|
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|
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int n1 = 4; //SAI prescaler 4 => (n1*n2) = multiple of 4
|
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int n2 = 1 + (24000000 * 27) / (fs * 256 * n1); |
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double C = ((double)fs * 256 * n1 * n2) / 24000000; |
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int c0 = C; |
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int c2 = 10000; |
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int c1 = C * c2 - (c0 * c2); |
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set_audioClock(c0, c1, c2); |
|
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// clear SAI2_CLK register locations
|
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|
CCM_CSCMR1 = (CCM_CSCMR1 & ~(CCM_CSCMR1_SAI2_CLK_SEL_MASK)) |
|
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| CCM_CSCMR1_SAI2_CLK_SEL(2); |
|
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CCM_CS2CDR = (CCM_CS2CDR & ~(CCM_CS2CDR_SAI2_CLK_PRED_MASK | CCM_CS2CDR_SAI2_CLK_PODF_MASK)) |
|
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| CCM_CS2CDR_SAI2_CLK_PRED(n1-1) // &0x07
|
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| CCM_CS2CDR_SAI2_CLK_PODF(n2-1); // &0x3f
|
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// Select MCLK
|
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|
IOMUXC_GPR_GPR1 = (IOMUXC_GPR_GPR1 |
|
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|
& ~(IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL_MASK)) |
|
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| (IOMUXC_GPR_GPR1_SAI2_MCLK_DIR | IOMUXC_GPR_GPR1_SAI2_MCLK3_SEL(0)); |
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|
// CORE_PIN23_CONFIG = 3; //1:MCLK
|
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|
|
// CORE_PIN21_CONFIG = 3; //1:RX_BCLK
|
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|
|
// CORE_PIN20_CONFIG = 3; //1:RX_SYNC
|
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|
CORE_PIN33_CONFIG = 2; //EMC_07, 2=SAI2_MCLK
|
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|
CORE_PIN4_CONFIG = 2; //EMC_06, 2=SAI2_TX_BCLK
|
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|
CORE_PIN3_CONFIG = 2; //EMC_05, 2=SAI2_TX_SYNC, page 429
|
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|
int rsync = 1; |
|
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|
int tsync = 0; |
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I2S2_TMR = 0; |
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|
//I2S2_TCSR = (1<<25); //Reset
|
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|
I2S2_TCR1 = I2S_TCR1_RFW(1); |
|
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|
I2S2_TCR2 = I2S_TCR2_SYNC(tsync) | I2S_TCR2_BCP // sync=0; tx is async;
|
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|
| (I2S_TCR2_BCD | I2S_TCR2_DIV((1)) | I2S_TCR2_MSEL(1)); |
|
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|
I2S2_TCR3 = I2S_TCR3_TCE; |
|
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|
|
I2S2_TCR4 = I2S_TCR4_FRSZ((2-1)) | I2S_TCR4_SYWD((32-1)) | I2S_TCR4_MF |
|
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|
|
| I2S_TCR4_FSD | I2S_TCR4_FSE | I2S_TCR4_FSP; |
|
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|
|
I2S2_TCR5 = I2S_TCR5_WNW((32-1)) | I2S_TCR5_W0W((32-1)) | I2S_TCR5_FBT((32-1)); |
|
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|
|
I2S2_RMR = 0; |
|
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|
|
//I2S2_RCSR = (1<<25); //Reset
|
|
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|
|
I2S2_RCR1 = I2S_RCR1_RFW(1); |
|
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|
|
I2S2_RCR2 = I2S_RCR2_SYNC(rsync) | I2S_RCR2_BCP // sync=0; rx is async;
|
|
|
|
|
| (I2S_RCR2_BCD | I2S_RCR2_DIV((1)) | I2S_RCR2_MSEL(1)); |
|
|
|
|
I2S2_RCR3 = I2S_RCR3_RCE; |
|
|
|
|
I2S2_RCR4 = I2S_RCR4_FRSZ((2-1)) | I2S_RCR4_SYWD((32-1)) | I2S_RCR4_MF |
|
|
|
|
| I2S_RCR4_FSE | I2S_RCR4_FSP | I2S_RCR4_FSD; |
|
|
|
|
I2S2_RCR5 = I2S_RCR5_WNW((32-1)) | I2S_RCR5_W0W((32-1)) | I2S_RCR5_FBT((32-1)); |
|
|
|
|
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
/******************************************************************/ |
|
|
|
|
|
|
|
|
|
// From Chip: The I2SSlave functionality has NOT been extended to
|
|
|
|
|
// allow for different block sizes or sample rates (2020-10-31)
|
|
|
|
|
|
|
|
|
|
void AudioOutputI2S2slave_F32::begin(void) |
|
|
|
|
{ |
|
|
|
|
dma.begin(true); // Allocate the DMA channel first
|
|
|
|
|
|
|
|
|
|
//pinMode(2, OUTPUT);
|
|
|
|
|
block_left_1st = NULL; |
|
|
|
|
block_right_1st = NULL; |
|
|
|
|
|
|
|
|
|
AudioOutputI2S2slave_F32::config_i2s(); |
|
|
|
|
|
|
|
|
|
CORE_PIN2_CONFIG = 2; //1:TX_DATA0
|
|
|
|
|
dma.TCD->SADDR = i2s2_tx_buffer; |
|
|
|
|
dma.TCD->SOFF = 2; |
|
|
|
|
dma.TCD->ATTR = DMA_TCD_ATTR_SSIZE(1) | DMA_TCD_ATTR_DSIZE(1); |
|
|
|
|
dma.TCD->NBYTES_MLNO = 2; |
|
|
|
|
dma.TCD->SLAST = -sizeof(i2s2_tx_buffer); |
|
|
|
|
//dma.TCD->DADDR = (void *)((uint32_t)&I2S1_TDR1 + 2);
|
|
|
|
|
dma.TCD->DOFF = 0; |
|
|
|
|
dma.TCD->CITER_ELINKNO = sizeof(i2s2_tx_buffer) / 2; |
|
|
|
|
dma.TCD->DLASTSGA = 0; |
|
|
|
|
dma.TCD->BITER_ELINKNO = sizeof(i2s2_tx_buffer) / 2; |
|
|
|
|
//dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SAI2_TX);
|
|
|
|
|
dma.TCD->DADDR = (void *)((uint32_t)&I2S2_TDR0 + 2); |
|
|
|
|
dma.TCD->CSR = DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_INTMAJOR; |
|
|
|
|
dma.triggerAtHardwareEvent(DMAMUX_SOURCE_SAI2_TX); |
|
|
|
|
dma.enable(); |
|
|
|
|
|
|
|
|
|
// I2S2_RCSR |= I2S_RCSR_RE | I2S_RCSR_BCE;
|
|
|
|
|
// I2S2_TCSR = I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE;
|
|
|
|
|
I2S2_TCSR |= I2S_TCSR_TE | I2S_TCSR_BCE | I2S_TCSR_FRDE | I2S_TCSR_FR; |
|
|
|
|
|
|
|
|
|
update_responsibility = update_setup(); |
|
|
|
|
//dma.enable();
|
|
|
|
|
dma.attachInterrupt(AudioOutputI2S2_F32::isr); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void AudioOutputI2S2slave_F32::config_i2s(void) |
|
|
|
|
{ |
|
|
|
|
|
|
|
|
|
CCM_CCGR5 |= CCM_CCGR5_SAI2(CCM_CCGR_ON); |
|
|
|
|
|
|
|
|
|
// if either transmitter or receiver is enabled, do nothing
|
|
|
|
|
if (I2S2_TCSR & I2S_TCSR_TE) return; |
|
|
|
|
if (I2S2_RCSR & I2S_RCSR_RE) return; |
|
|
|
|
|
|
|
|
|
// not using MCLK in slave mode - hope that's ok?
|
|
|
|
|
// //CORE_PIN23_CONFIG = 3; // AD_B1_09 ALT3=SAI1_MCLK
|
|
|
|
|
// CORE_PIN21_CONFIG = 3; // AD_B1_11 ALT3=SAI1_RX_BCLK
|
|
|
|
|
// CORE_PIN20_CONFIG = 3; // AD_B1_10 ALT3=SAI1_RX_SYNC
|
|
|
|
|
CORE_PIN4_CONFIG = 2; //2:TX_BCLK
|
|
|
|
|
CORE_PIN3_CONFIG = 2; //2:TX_SYNC
|
|
|
|
|
IOMUXC_SAI2_RX_BCLK_SELECT_INPUT = 0; //page 422 bitclock IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06
|
|
|
|
|
IOMUXC_SAI2_RX_SYNC_SELECT_INPUT = 0; //IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05
|
|
|
|
|
|
|
|
|
|
int rsync = 1; |
|
|
|
|
int tsync = 0; |
|
|
|
|
// uint32_t noBits = 32;
|
|
|
|
|
// uint32_t noBitsM1=noBits-1;
|
|
|
|
|
|
|
|
|
|
// configure transmitter
|
|
|
|
|
I2S2_TMR = 0; |
|
|
|
|
I2S2_TCR1 = I2S_TCR1_RFW(1); // watermark at half fifo size
|
|
|
|
|
I2S2_TCR2 = I2S_TCR2_SYNC(tsync) | I2S_TCR2_BCP; |
|
|
|
|
I2S2_TCR3 = I2S_TCR3_TCE; |
|
|
|
|
I2S2_TCR4 = I2S_TCR4_FRSZ(1) | I2S_TCR4_SYWD(31) | I2S_TCR4_MF |
|
|
|
|
| I2S_TCR4_FSE | I2S_TCR4_FSP; |
|
|
|
|
I2S2_TCR5 = I2S_TCR5_WNW(31) | I2S_TCR5_W0W(31) | I2S_TCR5_FBT(31); |
|
|
|
|
|
|
|
|
|
// configure receiver
|
|
|
|
|
I2S2_RMR = 0; |
|
|
|
|
I2S2_RCR1 = I2S_RCR1_RFW(1); |
|
|
|
|
I2S2_RCR2 = I2S_RCR2_SYNC(rsync) | I2S_TCR2_BCP; |
|
|
|
|
I2S2_RCR3 = I2S_RCR3_RCE; |
|
|
|
|
I2S2_RCR4 = I2S_RCR4_FRSZ(1) | I2S_RCR4_SYWD(31) | I2S_RCR4_MF |
|
|
|
|
| I2S_RCR4_FSE | I2S_RCR4_FSP; |
|
|
|
|
I2S2_RCR5 = I2S_RCR5_WNW(31) | I2S_RCR5_W0W(31) | I2S_RCR5_FBT(31); |
|
|
|
|
|
|
|
|
|
} |
DGHC
1 year ago
committed by
GitHub