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385 lines
14 KiB
385 lines
14 KiB
5 months ago
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/*
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Copyright 2012 Google Inc.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include <math.h>
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#include <cstdlib>
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#include <stdint.h>
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#include "synth.h"
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#include "sin.h"
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#include "fm_op_kernel.h"
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#ifdef __ARM_NEON
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#include <arm_neon.h>
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extern "C"
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void neon_fm_kernel(const int32_t *in, const int32_t *busin, int32_t *out, int32_t count,
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int32_t phase0, int32_t freq, int32_t gain1, int32_t dgain);
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const int32_t __attribute__ ((aligned(16))) const_0_1_2_3_arg[4] = {0, 1, 2, 3};
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const int32_t __attribute__ ((aligned(16))) mask23_arg = 0x7fffff;
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const float __attribute__ ((aligned(16))) coeffs_arg[4] = {
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-0.01880853017455781, 0.25215252666796095, -1.2333439964934032, 1.0
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};
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const int32_t __attribute__ ((aligned(16))) zeros[_N_] = {0};
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void neon_fm_kernel(const int32_t *in, const int32_t *busin, int32_t *out, int32_t count,
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int32_t phase0, int32_t freq_arg, int32_t gain1_arg, int32_t dgain_arg) {
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int32x4_t phase = vld1q_dup_s32(&phase0);
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int32x4_t freq = vld1q_dup_s32(&freq_arg);
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int32x4_t const_0_1_2_3 = vld1q_s32(const_0_1_2_3_arg);
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phase = vmlaq_s32(phase, freq, const_0_1_2_3);
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int32x4_t gain1 = vld1q_dup_s32(&gain1_arg);
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int32x4_t dgain = vld1q_dup_s32(&dgain_arg);
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gain1 = vmlaq_s32(gain1, dgain, const_0_1_2_3);
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int32x4_t mask23 = vld1q_dup_s32(&mask23_arg);
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float32x4_t coeffs = vld1q_f32(coeffs_arg);
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float32x4_t gainf = vcvtq_n_f32_s32(gain1, 24);
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int32x4_t freq4 = vshlq_n_s32(freq, 2);
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float32x4_t dgainf = vcvtq_n_f32_s32(dgain, 22);
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count -= 4;
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int32x4_t q15 = vmovq_n_s32(0x800000);
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int32x4_t q7 = vmovq_n_s32(0x400000);
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while (true) {
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int32x4_t phase4 = vaddq_s32(phase, freq4);
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int32x4_t phase8 = vaddq_s32(phase4, freq4);
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int32x4_t data1a = vld1q_s32(in);
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data1a = vaddq_s32(data1a, phase);
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int32x4_t data1b = vld1q_s32(in + 4);
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data1b = vaddq_s32(data1b, phase4);
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int32x4_t data1c = vld1q_s32(in + 8);
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data1c = vaddq_s32(data1c, phase8);
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phase = vaddq_s32(phase8, freq4);
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in += 12;
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int32x4_t data4a = (int32x4_t)vtstq_s32(data1a, q15);
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int32x4_t data4b = (int32x4_t)vtstq_s32(data1b, q15);
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int32x4_t data4c = (int32x4_t)vtstq_s32(data1c, q15);
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data1a = vandq_s32(data1a, mask23);
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data1b = vandq_s32(data1b, mask23);
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data1c = vandq_s32(data1c, mask23);
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data1a = vsubq_s32(data1a, q7);
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data1b = vsubq_s32(data1b, q7);
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data1c = vsubq_s32(data1c, q7);
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float32x4_t fdata1a = vcvtq_n_f32_s32(data1a, 22);
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float32x4_t fdata1b = vcvtq_n_f32_s32(data1b, 22);
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float32x4_t fdata1c = vcvtq_n_f32_s32(data1c, 22);
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fdata1a = vmulq_f32(fdata1a, fdata1a);
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fdata1b = vmulq_f32(fdata1b, fdata1b);
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fdata1c = vmulq_f32(fdata1c, fdata1c);
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float32x4_t fdata2a = vdupq_lane_f32(vget_low_f32(coeffs), 1);
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float32x4_t fdata2b = vdupq_lane_f32(vget_low_f32(coeffs), 1);
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float32x4_t fdata2c = vdupq_lane_f32(vget_low_f32(coeffs), 1);
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fdata2a = vmlaq_lane_f32(fdata2a, fdata1a, vget_low_f32(coeffs), 0);
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fdata2b = vmlaq_lane_f32(fdata2b, fdata1b, vget_low_f32(coeffs), 0);
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fdata2c = vmlaq_lane_f32(fdata2c, fdata1c, vget_low_f32(coeffs), 0);
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float32x4_t fdata3a = vdupq_lane_f32(vget_high_f32(coeffs), 0);
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float32x4_t fdata3b = vdupq_lane_f32(vget_high_f32(coeffs), 0);
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float32x4_t fdata3c = vdupq_lane_f32(vget_high_f32(coeffs), 0);
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fdata3a = vmlaq_f32(fdata3a, fdata1a, fdata2a);
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fdata3b = vmlaq_f32(fdata3b, fdata1b, fdata2b);
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fdata3c = vmlaq_f32(fdata3c, fdata1c, fdata2c);
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fdata2a = vdupq_lane_f32(vget_high_f32(coeffs), 1);
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fdata2b = vdupq_lane_f32(vget_high_f32(coeffs), 1);
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fdata2c = vdupq_lane_f32(vget_high_f32(coeffs), 1);
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fdata2a = vmlaq_f32(fdata2a, fdata1a, fdata3a);
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fdata2b = vmlaq_f32(fdata2b, fdata1b, fdata3b);
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fdata2c = vmlaq_f32(fdata2c, fdata1c, fdata3c);
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fdata3a = vaddq_f32(gainf, dgainf);
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fdata3b = vaddq_f32(fdata3a, dgainf);
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fdata2a = vmulq_f32(fdata2a, gainf);
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fdata2b = vmulq_f32(fdata2b, fdata3a);
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fdata2c = vmulq_f32(fdata2c, fdata3b);
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gainf = vaddq_f32(fdata3b, dgainf);
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int32x4_t data3a = vcvtq_n_s32_f32(fdata2a, 24);
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int32x4_t data3b = vcvtq_n_s32_f32(fdata2b, 24);
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int32x4_t data3c = vcvtq_n_s32_f32(fdata2c, 24);
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data1a = vld1q_s32(busin);
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data1b = vld1q_s32(busin + 4);
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data1c = vld1q_s32(busin + 8);
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busin += 12;
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data3a = veorq_s32(data3a, data4a);
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data3b = veorq_s32(data3b, data4b);
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data3c = veorq_s32(data3c, data4c);
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data3a = vaddq_s32(data3a, data1a);
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data3b = vaddq_s32(data3b, data1b);
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data3c = vaddq_s32(data3c, data1c);
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vst1q_s32(out, data3a);
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vst1q_s32(out + 4, data3b);
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vst1q_s32(out + 8, data3c);
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out += 12;
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count -= 12;
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if (count <= 0) {
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if (count == 0) {
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// finish last chunk of 4
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data1a = vld1q_s32(in);
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data1a = vaddq_s32(data1a, phase);
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data4a = (int32x4_t)vtstq_s32(data1a, q15);
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data1a = vandq_s32(data1a, mask23);
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data1a = vsubq_s32(data1a, q7);
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fdata1a = vcvtq_n_f32_s32(data1a, 22);
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fdata1a = vmulq_f32(fdata1a, fdata1a);
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fdata2a = vdupq_lane_f32(vget_low_f32(coeffs), 1);
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fdata2a = vmlaq_lane_f32(fdata2a, fdata1a, vget_low_f32(coeffs), 0);
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fdata3a = vdupq_lane_f32(vget_high_f32(coeffs), 0);
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fdata3a = vmlaq_f32(fdata3a, fdata1a, fdata2a);
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fdata2a = vdupq_lane_f32(vget_high_f32(coeffs), 1);
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fdata2a = vmlaq_f32(fdata2a, fdata1a, fdata3a);
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fdata2a = vmulq_f32(fdata2a, gainf);
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data3a = vcvtq_n_s32_f32(fdata2a, 24);
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data1a = vld1q_s32(busin);
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data3a = veorq_s32(data3a, data4a);
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data3a = vaddq_s32(data3a, data1a);
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vst1q_s32(out, data3a);
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}
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break;
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}
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}
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}
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#endif
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void FmOpKernel::compute(int32_t *output, const int32_t *input,
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int32_t phase0, int32_t freq,
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int32_t gain1, int32_t gain2, bool add) {
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int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
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int32_t gain = gain1;
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#ifdef __ARM_NEON
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neon_fm_kernel(input, add ? output : zeros, output, _N_,
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phase0, freq, gain, dgain);
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#else
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int32_t phase = phase0;
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if (add) {
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for (int i = 0; i < _N_; i++) {
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gain += dgain;
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int32_t y = Sin::lookup(phase + input[i]);
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int32_t y1 = ((int64_t)y * (int64_t)gain) >> 24;
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output[i] += y1;
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phase += freq;
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}
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} else {
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for (int i = 0; i < _N_; i++) {
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gain += dgain;
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int32_t y = Sin::lookup(phase + input[i]);
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int32_t y1 = ((int64_t)y * (int64_t)gain) >> 24;
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output[i] = y1;
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phase += freq;
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}
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}
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#endif
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}
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void FmOpKernel::compute_pure(int32_t *output, int32_t phase0, int32_t freq,
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int32_t gain1, int32_t gain2, bool add) {
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int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
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int32_t gain = gain1;
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#ifdef __ARM_NEON
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neon_fm_kernel(zeros, add ? output : zeros, output, _N_,
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phase0, freq, gain, dgain);
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#else
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int32_t phase = phase0;
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if (add) {
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for (int i = 0; i < _N_; i++) {
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gain += dgain;
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int32_t y = Sin::lookup(phase);
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int32_t y1 = ((int64_t)y * (int64_t)gain) >> 24;
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output[i] += y1;
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phase += freq;
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}
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} else {
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for (int i = 0; i < _N_; i++) {
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gain += dgain;
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int32_t y = Sin::lookup(phase);
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int32_t y1 = ((int64_t)y * (int64_t)gain) >> 24;
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output[i] = y1;
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phase += freq;
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}
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}
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#endif
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}
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#define noDOUBLE_ACCURACY
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#define HIGH_ACCURACY
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void FmOpKernel::compute_fb(int32_t *output, int32_t phase0, int32_t freq,
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int32_t gain1, int32_t gain2,
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int32_t *fb_buf, int32_t fb_shift, bool add) {
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int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
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int32_t gain = gain1;
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int32_t phase = phase0;
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int32_t y0 = fb_buf[0];
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int32_t y = fb_buf[1];
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if (add) {
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for (int i = 0; i < _N_; i++) {
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gain += dgain;
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int32_t scaled_fb = (y0 + y) >> (fb_shift + 1);
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y0 = y;
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y = Sin::lookup(phase + scaled_fb);
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y = ((int64_t)y * (int64_t)gain) >> 24;
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output[i] += y;
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phase += freq;
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}
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} else {
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for (int i = 0; i < _N_; i++) {
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gain += dgain;
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int32_t scaled_fb = (y0 + y) >> (fb_shift + 1);
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y0 = y;
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y = Sin::lookup(phase + scaled_fb);
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y = ((int64_t)y * (int64_t)gain) >> 24;
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output[i] = y;
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phase += freq;
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}
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}
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fb_buf[0] = y0;
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fb_buf[1] = y;
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}
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////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////
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// Experimental sine wave generators below
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#if 0
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// Results: accuracy 64.3 mean, 170 worst case
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// high accuracy: 5.0 mean, 49 worst case
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void FmOpKernel::compute_pure(int32_t *output, int32_t phase0, int32_t freq,
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int32_t gain1, int32_t gain2, bool add) {
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int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
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int32_t gain = gain1;
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int32_t phase = phase0;
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#ifdef HIGH_ACCURACY
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int32_t u = Sin::compute10(phase << 6);
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u = ((int64_t)u * gain) >> 30;
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int32_t v = Sin::compute10((phase << 6) + (1 << 28)); // quarter cycle
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v = ((int64_t)v * gain) >> 30;
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int32_t s = Sin::compute10(freq << 6);
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int32_t c = Sin::compute10((freq << 6) + (1 << 28));
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#else
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int32_t u = Sin::compute(phase);
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u = ((int64_t)u * gain) >> 24;
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int32_t v = Sin::compute(phase + (1 << 22)); // quarter cycle
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v = ((int64_t)v * gain) >> 24;
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int32_t s = Sin::compute(freq) << 6;
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int32_t c = Sin::compute(freq + (1 << 22)) << 6;
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#endif
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for (int i = 0; i < _N_; i++) {
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output[i] = u;
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int32_t t = ((int64_t)v * (int64_t)c - (int64_t)u * (int64_t)s) >> 30;
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u = ((int64_t)u * (int64_t)c + (int64_t)v * (int64_t)s) >> 30;
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v = t;
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||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if 0
|
||
|
|
// Results: accuracy 392.3 mean, 15190 worst case (near freq = 0.5)
|
||
|
|
// for freq < 0.25, 275.2 mean, 716 worst
|
||
|
|
// high accuracy: 57.4 mean, 7559 worst
|
||
|
|
// freq < 0.25: 17.9 mean, 78 worst
|
||
|
|
void FmOpKernel::compute_pure(int32_t *output, int32_t phase0, int32_t freq,
|
||
|
|
int32_t gain1, int32_t gain2, bool add) {
|
||
|
|
int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
|
||
|
|
int32_t gain = gain1;
|
||
|
|
int32_t phase = phase0;
|
||
|
|
#ifdef HIGH_ACCURACY
|
||
|
|
int32_t u = floor(gain * sin(phase * (M_PI / (1 << 23))) + 0.5);
|
||
|
|
int32_t v = floor(gain * cos((phase - freq * 0.5) * (M_PI / (1 << 23))) + 0.5);
|
||
|
|
int32_t a = floor((1 << 25) * sin(freq * (M_PI / (1 << 24))) + 0.5);
|
||
|
|
#else
|
||
|
|
int32_t u = Sin::compute(phase);
|
||
|
|
u = ((int64_t)u * gain) >> 24;
|
||
|
|
int32_t v = Sin::compute(phase + (1 << 22) - (freq >> 1));
|
||
|
|
v = ((int64_t)v * gain) >> 24;
|
||
|
|
int32_t a = Sin::compute(freq >> 1) << 1;
|
||
|
|
#endif
|
||
|
|
for (int i = 0; i < _N_; i++) {
|
||
|
|
output[i] = u;
|
||
|
|
v -= ((int64_t)a * (int64_t)u) >> 24;
|
||
|
|
u += ((int64_t)a * (int64_t)v) >> 24;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if 0
|
||
|
|
// Results: accuracy 370.0 mean, 15480 worst case (near freq = 0.5)
|
||
|
|
// with FRAC_NUM accuracy initialization: mean 1.55, worst 58 (near freq = 0)
|
||
|
|
// with high accuracy: mean 4.2, worst 292 (near freq = 0.5)
|
||
|
|
void FmOpKernel::compute_pure(int32_t *output, int32_t phase0, int32_t freq,
|
||
|
|
int32_t gain1, int32_t gain2, bool add) {
|
||
|
|
int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
|
||
|
|
int32_t gain = gain1;
|
||
|
|
int32_t phase = phase0;
|
||
|
|
#ifdef DOUBLE_ACCURACY
|
||
|
|
int32_t u = floor((1 << 30) * sin(phase * (M_PI / (1 << 23))) + 0.5);
|
||
|
|
FRAC_NUM a_d = sin(freq * (M_PI / (1 << 24)));
|
||
|
|
int32_t v = floor((1LL << 31) * a_d * cos((phase - freq * 0.5) *
|
||
|
|
(M_PI / (1 << 23))) + 0.5);
|
||
|
|
int32_t aa = floor((1LL << 31) * a_d * a_d + 0.5);
|
||
|
|
#else
|
||
|
|
#ifdef HIGH_ACCURACY
|
||
|
|
int32_t u = Sin::compute10(phase << 6);
|
||
|
|
int32_t v = Sin::compute10((phase << 6) + (1 << 28) - (freq << 5));
|
||
|
|
int32_t a = Sin::compute10(freq << 5);
|
||
|
|
v = ((int64_t)v * (int64_t)a) >> 29;
|
||
|
|
int32_t aa = ((int64_t)a * (int64_t)a) >> 29;
|
||
|
|
#else
|
||
|
|
int32_t u = Sin::compute(phase) << 6;
|
||
|
|
int32_t v = Sin::compute(phase + (1 << 22) - (freq >> 1));
|
||
|
|
int32_t a = Sin::compute(freq >> 1);
|
||
|
|
v = ((int64_t)v * (int64_t)a) >> 17;
|
||
|
|
int32_t aa = ((int64_t)a * (int64_t)a) >> 17;
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
if (aa < 0) aa = (1 << 31) - 1;
|
||
|
|
for (int i = 0; i < _N_; i++) {
|
||
|
|
gain += dgain;
|
||
|
|
output[i] = ((int64_t)u * (int64_t)gain) >> 30;
|
||
|
|
v -= ((int64_t)aa * (int64_t)u) >> 29;
|
||
|
|
u += v;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if 0
|
||
|
|
// Results:: accuracy 112.3 mean, 4262 worst (near freq = 0.5)
|
||
|
|
// high accuracy 2.9 mean, 143 worst
|
||
|
|
void FmOpKernel::compute_pure(int32_t *output, int32_t phase0, int32_t freq,
|
||
|
|
int32_t gain1, int32_t gain2, bool add) {
|
||
|
|
int32_t dgain = (gain2 - gain1 + (_N_ >> 1)) >> LG_N;
|
||
|
|
int32_t gain = gain1;
|
||
|
|
int32_t phase = phase0;
|
||
|
|
#ifdef HIGH_ACCURACY
|
||
|
|
int32_t u = Sin::compute10(phase << 6);
|
||
|
|
int32_t lastu = Sin::compute10((phase - freq) << 6);
|
||
|
|
int32_t a = Sin::compute10((freq << 6) + (1 << 28)) << 1;
|
||
|
|
#else
|
||
|
|
int32_t u = Sin::compute(phase) << 6;
|
||
|
|
int32_t lastu = Sin::compute(phase - freq) << 6;
|
||
|
|
int32_t a = Sin::compute(freq + (1 << 22)) << 7;
|
||
|
|
#endif
|
||
|
|
if (a < 0 && freq < 256) a = (1 << 31) - 1;
|
||
|
|
if (a > 0 && freq > 0x7fff00) a = -(1 << 31);
|
||
|
|
for (int i = 0; i < _N_; i++) {
|
||
|
|
gain += dgain;
|
||
|
|
output[i] = ((int64_t)u * (int64_t)gain) >> 30;
|
||
|
|
//output[i] = u;
|
||
|
|
int32_t newu = (((int64_t)u * (int64_t)a) >> 30) - lastu;
|
||
|
|
lastu = u;
|
||
|
|
u = newu;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|