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240 lines
6.2 KiB
240 lines
6.2 KiB
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2011 LeafLabs, LLC.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file maple_RET6.h
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* @author Marti Bolivar <mbolivar@leaflabs.com>
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* @brief Private include file for Maple RET6 Edition in boards.h
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*
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* See maple.h for more information on these definitions.
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*/
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#ifndef _BOARDS_GENERIC_STM32F103Z_H_
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#define _BOARDS_GENERIC_STM32F103Z_H_
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/* A few of these values will seem strange given that it's a
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* high-density board. */
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#define CYCLES_PER_MICROSECOND 72
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#define SYSTICK_RELOAD_VAL (F_CPU/1000) - 1 /* takes a cycle to reload */
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// USARTS
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#define BOARD_NR_USARTS 5
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#define BOARD_USART1_TX_PIN PA9
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#define BOARD_USART1_RX_PIN PA10
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#define BOARD_USART2_TX_PIN PA2
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#define BOARD_USART2_RX_PIN PA3
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#define BOARD_USART3_TX_PIN PB10
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#define BOARD_USART3_RX_PIN PB11
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#define BOARD_USART4_TX_PIN PC10
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#define BOARD_USART4_RX_PIN PC11
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#define BOARD_USART5_TX_PIN PC12
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#define BOARD_USART5_RX_PIN PD2
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/* Note:
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*
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* SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but
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* leave the definitions so as not to clutter things up. This is only
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* OK since RET6 Ed. is specifically advertised as a beta board. */
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#define BOARD_NR_SPI 3
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#define BOARD_SPI1_NSS_PIN PA4
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#define BOARD_SPI1_SCK_PIN PA5
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#define BOARD_SPI1_MISO_PIN PA6
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#define BOARD_SPI1_MOSI_PIN PA7
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#define BOARD_SPI2_NSS_PIN PB12
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#define BOARD_SPI2_SCK_PIN PB13
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#define BOARD_SPI2_MISO_PIN PB14
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#define BOARD_SPI2_MOSI_PIN PB15
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#define BOARD_SPI3_NSS_PIN PA15
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#define BOARD_SPI3_SCK_PIN PB3
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#define BOARD_SPI3_MISO_PIN PB4
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#define BOARD_SPI3_MOSI_PIN PB5
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/* GPIO A to E = 5 * 16 - BOOT1 not used = 79*/
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#define BOARD_NR_GPIO_PINS 112
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/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which
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* isn't broken out to a header and is thus unusable for PWM. */
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#define BOARD_NR_PWM_PINS 19
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#define BOARD_NR_ADC_PINS 16
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#define BOARD_NR_USED_PINS 7
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#define BOARD_JTMS_SWDIO_PIN 39
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#define BOARD_JTCK_SWCLK_PIN 40
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#define BOARD_JTDI_PIN 41
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#define BOARD_JTDO_PIN 42
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#define BOARD_NJTRST_PIN 43
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/* USB configuration. BOARD_USB_DISC_DEV is the GPIO port containing
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* the USB_DISC pin, and BOARD_USB_DISC_BIT is that pin's bit. */
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#define BOARD_USB_DISC_DEV GPIOC
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#define BOARD_USB_DISC_BIT 12
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/*
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* SDIO Pins
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*/
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#define BOARD_SDIO_D0 PC8
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#define BOARD_SDIO_D1 PC9
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#define BOARD_SDIO_D2 PC10
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#define BOARD_SDIO_D3 PC11
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#define BOARD_SDIO_CLK PC12
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#define BOARD_SDIO_CMD PD2
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/* Pin aliases: these give the GPIO port/bit for each pin as an
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* enum. These are optional, but recommended. They make it easier to
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* write code using low-level GPIO functionality. */
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enum {
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PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15,
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PB0,PB1,PB2,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15,
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PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15,
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PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7,PD8,PD9,PD10,PD11,PD12,PD13,PD14,PD15,
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PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15,
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PF0,PF1,PF2,PF3,PF4,PF5,PF6,PF7,PF8,PF9,PF10,PF11,PF12,PF13,PF14,PF15,
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PG0,PG1,PG2,PG3,PG4,PG5,PG6,PG7,PG8,PG9,PG10,PG11,PG12,PG13,PG14,PG15
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};/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */
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/*
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#define PA0 0
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#define PA1 1
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#define PA2 2
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#define PA3 3
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#define PA4 4
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#define PA5 5
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#define PA6 6
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#define PA7 7
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#define PA8 8
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#define PA9 9
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#define PA10 10
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#define PA11 11
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#define PA12 12
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#define PA13 13
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#define PA14 14
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#define PA15 15
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#define PB0 16
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#define PB1 17
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#define PB2 18
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#define PB3 19
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#define PB4 20
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#define PB5 21
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#define PB6 22
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#define PB7 23
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#define PB8 24
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#define PB9 25
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#define PB10 26
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#define PB11 27
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#define PB12 28
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#define PB13 29
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#define PB14 30
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#define PB15 31
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#define PC0 32
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#define PC1 33
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#define PC2 34
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#define PC3 35
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#define PC4 36
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#define PC5 37
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#define PC6 38
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#define PC7 39
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#define PC8 40
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#define PC9 41
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#define PC10 42
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#define PC11 43
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#define PC12 44
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#define PC13 45
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#define PC14 46
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#define PC15 47
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#define PD0 48
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#define PD1 49
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#define PD2 50
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#define PD3 51
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#define PD4 52
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#define PD5 53
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#define PD6 54
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#define PD7 55
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#define PD8 56
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#define PD9 57
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#define PD10 58
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#define PD11 59
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#define PD12 60
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#define PD13 61
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#define PD14 62
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#define PD15 63
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#define PE0 64
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#define PE1 65
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#define PE2 66
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#define PE3 67
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#define PE4 68
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#define PE5 69
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#define PE6 70
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#define PE7 71
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#define PE8 72
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#define PE9 73
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#define PE10 74
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#define PE11 75
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#define PE12 76
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#define PE13 77
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#define PE14 78
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#define PE15 79
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#define PF0 80
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#define PF1 81
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#define PF2 82
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#define PF3 83
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#define PF4 84
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#define PF5 85
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#define PF6 86
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#define PF7 87
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#define PF8 88
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#define PF9 89
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#define PF10 90
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#define PF11 91
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#define PF12 92
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#define PF13 93
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#define PF14 94
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#define PF15 95
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#define PG0 96
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#define PG1 97
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#define PG2 98
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#define PG3 99
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#define PG4 100
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#define PG5 101
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#define PG6 102
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#define PG7 103
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#define PG8 104
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#define PG9 105
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#define PG10 106
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#define PG11 107
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#define PG12 108
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#define PG13 109
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#define PG14 110
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#define PG15 111 */
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#endif
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